WM8994ECSSLASHR datasheet(329/363 Pages) CIRRUS

329 / 363 page

WM8994

Rev 4.6

329

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R1542

(0606h) AIF1

ADC1 Left

Mixer Routing

ADC1L_TO_AIF

1ADC1L

Enable ADCL / DMIC1 (Left) to AIF1 (Timeslot 0, Left)

output

0 = Disabled

1 = Enabled

AIF2DACL_TO_

AIF1ADC1L

Enable AIF2 (Left) to AIF1 (Timeslot 0, Left) output

0 = Disabled

1 = Enabled

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R1543

(0607h) AIF1

ADC1 Right

Mixer Routing

ADC1R_TO_AIF

1ADC1R

Enable ADCR / DMIC1 (Right) to AIF1 (Timeslot 0, Right)

output

0 = Disabled

1 = Enabled

AIF2DACR_TO_

AIF1ADC1R

Enable AIF2 (Right) to AIF1 (Timeslot 0, Right) output

0 = Disabled

1 = Enabled

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R1544

(0608h) AIF1

ADC2 Left

Mixer Routing

ADC2L_TO_AIF

1ADC2L

Enable DMIC2 (Left) to AIF1 (Timeslot 1, Left) output

0 = Disabled

1 = Enabled

AIF2DACL_TO_

AIF1ADC2L

Enable AIF2 (Left) to AIF1 (Timeslot 1, Left) output

0 = Disabled

1 = Enabled

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R1545

(0609h) AIF1

ADC2 Right

mixer Routing

ADC2R_TO_AIF

1ADC2R

Enable DMIC2 (Right) to AIF1 (Timeslot 1, Right) output

0 = Disabled

1 = Enabled

AIF2DACR_TO_

AIF1ADC2R

Enable AIF2 (Right) to AIF1 (Timeslot 1, Right) output

0 = Disabled

1 = Enabled

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R1552

(0610h)

DAC1 Left

DAC1L_MUTE

DAC1L Soft Mute Control

0 = DAC Un-mute

1 = DAC Mute

WM8994ECS/R датащи(PDF) 329 Page - Cirrus Logic

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