WM8994ECSSLASHR datasheet(303/363 Pages) CIRRUS

303 / 363 page

WM8994

Rev 4.6

303

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R1088

(0440h) AIF1

DRC1 (1)

15:11

AIF1DRC1_SIG

_DET_RMS

[4:0]

0_0000

AIF1 DRC1 Signal Detect RMS Threshold.

This is the RMS signal level for signal detect to be indicated

when AIF1DRC1_SIG_DET_MODE=1.

00000 = -30dB

00001 = -31.5dB

…. (1.5dB steps)

11110 = -75dB

11111 = -76.5dB

10:9

AIF1DRC1_SIG

_DET_PK [1:0]

AIF1 DRC1 Signal Detect Peak Threshold.

This is the Peak/RMS ratio, or Crest Factor, level for signal

detect to be indicated when

AIF1DRC1_SIG_DET_MODE=0.

00 = 12dB

01 = 18dB

10 = 24dB

11 = 30dB

AIF1DRC1_NG_

ENA

AIF1 DRC1 Noise Gate Enable

0 = Disabled

1 = Enabled

AIF1DRC1_SIG

_DET_MODE

AIF1 DRC1 Signal Detect Mode

0 = Peak threshold mode

1 = RMS threshold mode

AIF1DRC1_SIG

_DET

AIF1 DRC1 Signal Detect Enable

0 = Disabled

1 = Enabled

AIF1DRC1_KNE

E2_OP_ENA

AIF1 DRC1 KNEE2_OP Enable

0 = Disabled

1 = Enabled

AIF1DRC1_QR

AIF1 DRC1 Quick-release Enable

0 = Disabled

1 = Enabled

AIF1DRC1_ANT

ICLIP

AIF1 DRC1 Anti-clip Enable

0 = Disabled

1 = Enabled

AIF1DAC1_DRC

_ENA

Enable DRC in AIF1DAC1 playback path (AIF1, Timeslot 0)

0 = Disabled

1 = Enabled

AIF1ADC1L_DR

C_ENA

Enable DRC in AIF1ADC1 (Left) record path (AIF1,

Timeslot 0)

0 = Disabled

1 = Enabled

AIF1ADC1R_DR

C_ENA

Enable DRC in AIF1ADC1 (Right) record path (AIF1,

Timeslot 0)

0 = Disabled

1 = Enabled

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