WM8994ECSSLASHR datasheet(281/363 Pages) CIRRUS

281 / 363 page

WM8994

Rev 4.6

281

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

output signal path has been configured, and before DC

offset cancellation is scheduled. This bit should be set with

at least 20us delay after HPOUT1L_ENA.

HPOUT1R_RMV

_SHORT

Removes HPOUT1R short

0 = HPOUT1R short enabled

1 = HPOUT1R short removed

For normal operation, this bit should be set as the final step

of the HPOUT1R Enable sequence.

HPOUT1R_OUT

Enables HPOUT1R output stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set to 1 after the DC

offset cancellation has been scheduled.

HPOUT1R_DLY

Enables HPOUT1R intermediate stage

0 = Disabled

1 = Enabled

For normal operation, this bit should be set to 1 after the

output signal path has been configured, and before DC

offset cancellation is scheduled. This bit should be set with

at least 20us delay after HPOUT1R_ENA.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R256 (0100h)

Chip

Revision

3:0

CHIP_REV [3:0]

Chip revision

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R257 (0101h)

Control

Interface

Reserved - Do Not Change

SPI_CONTRD

Enable continuous read mode in SPI (3-wire/4-wire) modes

0 = Disabled

1 = Enabled

SPI_4WIRE

SPI control mode select

0 = 3-wire using bidirectional SDA

1 = 4-wire using SDOUT

SPI_CFG

SDA/SDOUT pin configuration

0 = CMOS

1 = Open Drain (SPI_4WIRE = 0)

1 = Wired ‘OR’ (SPI_4WIRE = 1)

AUTO_INC

Enables address auto-increment

(applies to 2-wire I2C mode only)

0 = Disabled

1 = Enabled

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