F6921 Datasheet

R35DS0092EU0102 Rev.1.02

Nov 14, 2024

Page 2

Contents

1. Pin Information .............................................................................................................................................4

1.1

Pin Assignments...................................................................................................................................4

1.2

Pin Descriptions....................................................................................................................................4

2. Specifications ...............................................................................................................................................5

2.1

Absolute Maximum Ratings..................................................................................................................5

2.2

Thermal Information..............................................................................................................................5

2.3

Recommended Operating Conditions...................................................................................................6

2.4

Electrical Specifications........................................................................................................................6

2.4.1.

DC Electrical Specifications....................................................................................................6

2.4.2.

RF Electrical Specifications....................................................................................................7

3. Typical Application Circuit ..........................................................................................................................8

4. Typical Performance Characteristics..........................................................................................................9

5. Evaluation Board ........................................................................................................................................11

5.1

Evaluation Board Photos ....................................................................................................................11

5.2

Evaluation Board Schematic...............................................................................................................12

5.3

Evaluation Board Operation................................................................................................................13

5.3.1.

Single Power Supply Operation............................................................................................13

5.3.2.

Independent VDD and IREF Bias Control ............................................................................13

6. Package Outline Drawings.........................................................................................................................14

7. Marking Diagram ........................................................................................................................................14

8. Ordering Information..................................................................................................................................14

9. Revision History .........................................................................................................................................14

Figures

Figure 1. Block Diagram.........................................................................................................................................1

Figure 2. Pin Assignments for 2.7 × 2.7 mm 23-pin FCBGA Package – Top View.................................................4

Figure 3. Typical Application Circuits......................................................................................................................8

Figure 4. Gain.........................................................................................................................................................9

Figure 5. Noise Figure............................................................................................................................................9

Figure 6. Input Match..............................................................................................................................................9

Figure 7. Output Match...........................................................................................................................................9

Figure 8. Input-to-Output Isolation..........................................................................................................................9

Figure 9. Ch-to-Ch Isolation ...................................................................................................................................9

Figure 10. Output 1dB Compression ....................................................................................................................10

Figure 11. Output Third Order Intercept ...............................................................................................................10

Figure 12. Supply Current, Per Channel...............................................................................................................10

Figure 13. IREF Pin Voltage vs Current ...............................................................................................................10

Figure 14. Evaluation Board - Top View...............................................................................................................11

Figure 15. Evaluation Board - Bottom View..........................................................................................................11

Figure 16. Evaluation Board - Schematic .............................................................................................................12