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TC9WMB1AFK датащи(PDF) 7 Page - Toshiba Semiconductor

номер детали TC9WMB1AFK
подробное описание детали  CMOS Digital Integrated Circuits Silicon Monolithic
PDF  18 Pages
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC9WMB1AFK датащи(HTML) 7 Page - Toshiba Semiconductor

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TC9WMB1AFK/FU,TC9WMB2AFK/FU
2007-10-19
7
(2)
Random read
A random read reads data at a specified address. A dummy write is necessary to specify an address.
In random read mode, supply a device address,
W
R/
(
= 0), and a word address after a start
condition. Unlike a byte or page write, where write data is supplied immediately, a dummy write only
specifies a word address. Then, supply a start condition and transfer a device address and
W
R/
(
= 1)
in the same way as for a current address read, to read data from the specified address.
(3)
Sequential read
A sequential read reads data sequentially from successive word addresses.
For either current address read or random read, upon receiving a start condition, a device address
and R/W (
= 1), an acknowledge (low) is placed on the SDA line, followed by the data at the address
pointed to by the internal address counter. When an acknowledge (low) is then received, the word
address is automatically incremented so that the next data is driven out.
After the last address is reached, the word address is rolled over to address 0.
Figure 9
SDA LINE
1
D
6
D
4
D
5
D
3
D
1
D
2
D
0
D
7
D
6
D
4
D
5
D
3
D
1
D
2
D
0
D
7
D
6
D
4
D
5
D
3
D
1
D
2
D
0
D
4
D
5
D
3
D
1
D
2
D
0
DEVICE
ADDRESS
R
E
A
D
A
C
K
R
/
W
D
7
A
C
K
S
T
O
P
DATA (n)
READ
DATA (n)
DATA (n
+ 1)
READ
DATA (n
+ 1)
A
C
K
DATA (n
+ 2)
READ
DATA (n
+ 2)
A
C
K
D
7
D
6
DATA (n
+ m)
READ
DATA (n
+ m)
N
O
A
C
K
Address
increment
Address
increment
Address
increment
Address
increment
Figure 8
*: Optional for the TC9WMB1A.
SDA LINE
1 0 1 0
0
W
6
W
4
W
5
W
3
W
1
W
2
W
0
S
T
A
R
T
M
S
B
DEVICE
ADDRESS
W
R
I
T
E
L
S
B
A
C
K
R
/
W
W
7
WORD
ADDRESS (n)
A
C
K
A
C
K
D
7
D
6
D
4
D
5
D
3
D
1
D
2
D
0
DATA (n)
S
T
O
P
L
S
B
M
S
B
10 10
1
S
T
A
R
T
M
S
B
DEVICE
ADDRESS
R
E
A
D
L
S
B
READ
DATA (n)
N
O
A
C
K
Address
increment
DUMMY WRITE
A
2
A
1
A
0
A
2
A
0
A
1
*



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