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PCM1774 датащи(PDF) 13 Page - Texas Instruments |
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PCM1774 датащи(HTML) 13 Page - Texas Instruments |
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13 / 49 page ![]() www.ti.com Power-Supply Current PCM1774 SLAS551 – JULY 2007 Table 3. Recommended Power-On Sequence REGISTER STEP NOTE SETTINGS 1 – Turn on all power supplies(1) 2 4027h Headphone amplifier L-ch volume (–6 dB)(2) 3 4127h Headphone amplifier R-ch volume (–6 dB)(2) 6 4427h Digital attenuator L-ch (–24 dB)(2) 7 4527h Digital attenuator R-ch (–24 dB) (2) 8 4620h DAC audio interface format (left-justified)(3) 12 49E0h DAC (DAL, DAR) and analog bias power up 13 5601h Zero-cross detection enable 14 4803h Analog mixer (MXL, MXR) power up 15 5811h Analog mixer input (SW2, SW5) select 16 49ECh Headphone amplifier (HPL, HPR, HPC) power up 18 4A01h VCOM power up 19 5230h Analog front end (D2S, MCB, PG1, 2, 5, 6) power up 20 5711h Analog input (MUX3, MUX4) select. Analog input (MUX1, MUX2) select (1) VDD should be turned on prior to or simultaneously with, the other power supplies. It is recommended to set register data with the system clock input after turning all power supplies on. (2) Any level is acceptable for volume or attenuation. Level should be resumed by register data recorded when system powers off. (3) Audio interface format should be set to match the DSP or decoder being used. Table 4. Recommended Power-Off Sequence REGISTER STEP NOTE SETTINGS 1 447Fh DAC L-ch digital soft-mute enable(1) 2 457Fh DAC R-ch digital soft-mute enable(1) 4 5811h Analog mixer input (SW2, SW5) select 5 49ECh Headphone amplifier (HPL, HPR, HPC) power up(2) 6 5200h Analog front end (D2S, MCB, PG1, 2, 5, 6) power down 7 5A00h PG1, PG2 gain control (0 dB) 8 4A00h VCOM power down 9 – Wait time (750 ms) (3) 10 49E0h Headphone amplifier (HPL, HPR, HPC) power down, speaker amplifier (SPL, SPR) power down 11 4800h Analog mixer (MXL, MXR) power down 12 4900h DAC (DAL, DAR) and analog bias power down 13 – Turn off all power supplies.(4) (1) Any level is acceptable for volume or attenuation. (2) The headphone amplifier must be operating during the power-off sequence. (3) PCM1774 requires time for VCOM to reach the ground level from the common level. The wait time allowed depends on the settings of register 125 PTM[1:0], RES[4:0]. The default setting is 750 ms for VCOM = 4.7 μF. (4) Power supply sequencing is not required. It is recommended to turn off all power supplies after setting the registers with the system clock input. The current consumption of the PCM1774 depends on power up/down status of each circuit module. In order to reduce the power consumption, disabling each module is recommended when it is not used in an application or operation. Table 5 shows the current consumption in some states. 13 Submit Documentation Feedback |
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