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LR645 датащи(PDF) 17 Page - Microchip Technology |
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LR645 датащи(HTML) 17 Page - Microchip Technology |
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17 / 24 page ![]() LR645 DS20005384B-page 17 2015-2023 Microchip Technology Inc. and its subsidiaries Microchip Technology Drawing C04-101-TO Rev D Sheet 2 of 2 3-Lead Plastic Transistor Outline (TO) [TO-92] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 2. Dimensioning and tolerancing per ASME Y14.5M 1. Dimensions D and E do not include mold flash or protrusions. Mold flash or BSC: Basic Dimension. Theoretically exact value shown without tolerances. protrusions shall not exceed .005" per side. Notes: .022 .014 b Lead Width .021 .014 c Lead Thickness .105 .080 R Molded Package Radius .210 .170 A Overall Length .205 .175 E Overall Width .165 .125 D Bottom to Package Flat .050 BSC e Pitch 3 N Number of Pins MAX MIN Dimension Limits INCHES Units Tip to Seating Plane L .500 - NOM - - - - - - - |
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