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DS20005384B-page 14

LR645

BOTTOM VIEW

Microchip Technology Drawing C04-034-N5 Rev C Sheet 1 of 2

For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

Note:

3-Lead Transistor Outline Package (Supertex N5) - [TO-220]

SIDE VIEW

TOP VIEW

E

2

0.381

B A

C

A

B

2X

12

N

SEATING

PLANE

0.355

B A

E

Q

D1

L1

D

L

A1

A

ØP

e

3X b2

3X b

A2

c

E1

(U)

(D2)

E2

END VIEW

H1

Supertex Legacy