TMP86FS49AIUG datasheet(184/296 Pages) TOSHIBA

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Page 168

14. Synchronous Serial Interface (SIO1)

14.3 Function

TMP86FS49AIUG

Figure 14-9 Example of Transmit Error Processingme

14.3.3.2 Receive mode

The receive mode is selected by writing “01B” to SIO1CR<SIOM>.

(1)

Starting the receive operation

Receive mode is selected by setting “01” to SIO1CR<SIOM>. Serial clock is selected by using

SIO1CR<SCK>. Transfer direction is selected by using SIO1CR<SIODIR>.

After SIO1CR<SIOS> is set to “1”, SIO1SR<SIOF> is set synchronously to “1” the falling edge of

SCK1

pin.

Synchronizing with the SCK1 pin's rising edge, the data is received sequentially from SI1 pin with

the direction of the bit specified by SIO1CR<SIODIR>.

SIO1SR<SEF> is kept in high level, between the first clock falling edge of SCK1 pin and eighth

clock falling edge.

When 8-bit data is received, the data is transferred to SIO1RDB from shift register. INTSIO1 inter-

rupt request is generated and SIO1SR<RXF> is set to “1”

Note: In internal clock operation, when the SIO1CR<SIOS> is set to "1", the serial clock is generated

from SCK1 pin after maximum 1-cycle of serial clock frequency.

(2)

During the receive operation

The SIO1SR<RXF> is cleared to “0” by reading a data from SIO1RDB.

In the internal clock operation, the serial clock stops to “H” level by an automatic-wait function

when the all of the 8-bit data has been received. Automatic-wait function is released by reading a

received data from SIO1RDB. Then, receive operation is restarted after maximum 1-cycle of serial

clock.

In external clock operation, after SIO1SR<RXF> is set to “1”, the received data must be read from

SIO1RDB, before the next data shift-in operation is finished.

Writing transmit

data B

Writing transmit

data A

Unknown

A7 A6

A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0

Start shift

operation

Start shift

operation

Start shift

operation

SIO1CR<SIOS>

SIO1SR<SIOF>

SIO1SR<SEF>

SCK1

SO1 pin

SIO1SR<TXF>

SIO1SR<TXERR>

INTSIO1

interrupt

request

SIO1TDB

SIO1CR

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