TMP88CU74F datasheet(39/132 Pages) TOSHIBA

39 / 132 page

TMP88CU74

2003-02-17

88CU74-39

On-Chip Peripheral Functions

2.1

Special Function Registers (SFR)

The TMP88CU74 uses the memory mapped I/O system, and all peripheral control and data

transfers are performed through the special function registers (SFR).

The SFR are mapped to addresses 00000H to 0003FH, and DBR are mapped to address

00F80H to 00FFFH.

Figure 2.1.1 shows the TMP88CU74 SFR and DBR.

Address

Read

Write

Address

Read

Write

00000H

P0 port

00020H

−

SBICR1 (SBI control register)

P1 port

SBIDBR (SBI Data buffer)

P2 port

−

2CAR (I2C Bus address)

P3 port

SBISR (SBI status)

SBICR2 (SBI control register)

P4 port

Reserved

P5 port

Reserved

P6 port

Reserved

P7 port

SIO1SR (SIO status)

SIO1CR1 (SIO1 control 1)

P8 port

SIO1CR2 (SIO1 control 2)

P9 port

VFTSR (VFT status)

VFTCR1 (VFT control 1)

−

P0CR (P0 port I/O output control)

VFTCR2 (VFT control 2)

−

P1CR (P1 port I/O output control)

P3CR (Port I/O control)

−

P4CR (P4 port I/O output control)

Reserved

−

P5CR (P5 port I/O output control)

Reserved

ADCCR (AD converter control)

Reserved

ADCDR (AD conv.result)

−

Reserved

−

TREG1AL

DVCR

−

TREG1AH

Reserved

TREG1BL

Reserved

TREG1BH

Reserved

−

TC1CR (TC1 control)

−

WDTCR1

−

TC2CR (TC2 control)

−

WDTCR2

−

TREG2L

TBTCR (TBT/TG/DVO control)

−

TREG2H

EINTCR (External interrupt control)

TREG3A (Timer register 3A)

SYSCR1

TREG3B (Timer register 3B)

−

SYSCR2

−

TC3CR (TC3 control)

EIRL

−

TREG4 (Timer register 4)

EIRH

−

TC4CR (TC4 control)

ILL

PD port

ILH

Reserved

PSWL

Reserved

PSWH

(a) Special function registers

Note 1: Do not access reserved areas by the program.

Note 2: −: Cannot be accessed.

Note 3: Write-only registers and interrupt latches cannot use the read-modify-write instructions (bit manipulation

instructions such as SET, CLR, etc. and logical operation instructions such as AND, OR, etc.).

Note 4: When defining address 0003FH with assembler symbols, use GRBS.

Address 0003EH must be GPSW/GFLAG.

Figure 2.1.1 SFR and DBR (1/2)

(Timer register 1A)

(Timer register1B)

Watch-dog

timer control

(Timer register 2)

(system control)

(Interrupt enable register)

(Interrupt latch)

(program status word)

2007-10-19

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