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Axelite Confidential Materials, do not copy or distribute without written consent.

Rev1.5 Dec.11, 2019

AX3075/B



BLOCK DIAGRAM

+

-

0.36V

-

+

VREF

ERROR

AMPLIFIER

FB

COMP

ramp

VIN

5V

BS

5V

Fault

Logics

UG

LX

+

-

SEN1

0.1V

Cable

COMP

GND

LG

UVP

Over Temperature

Protection

POR

Internal

Regulator

+

-

0.4V

Current

Sensor1

Current

Sensor2

SEN2

0.1V

Oscillator

120KHz/65KHz

Gate

Control

Zero

Current

Detection



PIN ASSIGNMENT

The package of AX3075/B TDFN-10L the pin assignment is given by:

TDFN-10L (3*3)

VIN

LG

1

SEN1

10

2

3

4

5

6

7

8

9

COMP

FB

SEN2

GND

UG

LX

BS

Exposed

Pad

(GND)

TOP View

The package of AX3075B MSOP-10L the pin assignment is given by:

(Top View)

1

2

3

4

8

7

6

5

MSOP-10L

VIN

FB

SEN2

COMP

UG

LX

BS

LG

9

10

SEN1

GND

AX3075B