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AX3075 датащи(PDF) 11 Page - AXElite technology co. ltd |
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AX3075 датащи(HTML) 11 Page - AXElite technology co. ltd |
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11 / 17 page ![]() 11/17 Axelite Confidential Materials, do not copy or distribute without written consent. Rev1.5 Dec.11, 2019 AX3075/B PCB Layout Recommendations 1. PCB trace defined as LX node, which connects to source of switching MOSFET, drain of rectifying MOSFET and high-voltage side of the inductor, should be as short and wide as possible. 2. All sensitive analog traces such as SEN1, SEN2, COMP and FB should place away from high-voltage switching nodes such as LX, UG or LG nodes to avoid coupling. 3. C8 input bypass capacitor should be placed to the VIN pin as close as possible. 4. Connections from the drivers to the respective gate of the high-side or the low-side MOSFET should be as short as possible to reduce stray inductance. Use a 0.65 mm (25 mils) or wider trace. 1. Gather the ground terminals of the VIN capacitor(s), VOUT capacitor(s), and the source of the low-side MOSFETs as close as possible. Signal ground and power ground should be connected strongly together near the device. |
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