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TMPR4951B датащи(PDF) 49 Page - Toshiba Semiconductor |
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TMPR4951B датащи(HTML) 49 Page - Toshiba Semiconductor |
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49 / 256 page ![]() Chapter 2 Features 2-1 2. Features • TX49/L3 Processor Core TX49/L3 Processor Core is a 64-bit RISC CPU core Toshiba developed based on the architecture of MIPS for interactive consumer applications including Printer, Network and set-top terminals. • Internal bus width is 64-bit, External bus width is 32-bit Core and Cache are connect with 64-bit Internal bus. External bus is 32-bit SysAD-bus I/F. This interface is compatible with the R4300, and R5000 system interfaces. • Power management Internal: 1.5 V I/O: 3.3 V or 2.5 V The TX49/L3 Processor support Power management mode (Halt, Doze) • Maximum operating frequency The TX49/L3 Processor’s maximum operating frequency are 200 MHz. The SysAD-bus I/F and TX49/L3 Processor’s maximum operating frequency is set by External pin (DivMode[1:0]). Ex. Core’s operating frequency is 300 MHz DivMode[1:0] MasterClock CPU Clock 00 50 MHz 200 MHz 1:4 01 80 MHz 200 MHz 1:2.5 10 100 MHz 200 MHz 1:2 11 66.6 MHz 200 MHz 1:3 • Package TX4951B: 100-pin LQFP • Part Number TMPR4951BFG-200: Maximum internal operating frequency = 200 MHz (Ask your nearest Toshiba sales representative for the latest part number.) |
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