PCI 9080

TECHNOLOGY

®

Flexible Connection to the PCI Bus

For add-in card and embedded system designers and integrators alike, the mis-

sion is clear: reduce the time to integrate new technology and time to market.

Achieving this task requires the latest in I/O technology. PLX Technology, Inc.

is committed to providing complete and proven PCI solutions with our PCI 9080

Bus Master I/O Accelerator interface chip.

interface with a programmable local bus. Integrating the latest in I/O technology,

the PCI 9080 contains an Intelligent I/O (I2O) messaging unit in hardware that

allows high performance and compatible software implementations of the I2O

bus protocol specification.

The highly flexible local bus solution can be configured to directly connect a

wide variety of processors, controllers and memory subsystems. Combined with

the PCI 9080RDK reference design kits, PCI SDK and I2O software development

kits available from PLX, the design-in process is simple and painless with little or

no glue logic. Customers are using the PCI 9080 with IBM PowerPC 40x, Motorola

MPC850/860, Intel i960C/J/H, Hitachi Super H, MIPS R 3000/4000/5000, NEC

V830/831, ARM, Motorola 68XXX, and others. Thoroughly tested and proven,

PLX products have become the gold standard of the industry.

Leading the way in PCI design, the PCI 9080 provides two intelligent DMA

channels with scatter/gather, programmable burst modes, and asynchronous

bus clocks to provide the best PCI throughput available. The versatility of the

PCI 9080 also allows for a local processor to configure other PCI devices in

the system.

While the PCI 9080 is capable of keeping up with the most demanding of

applications and the latest in technology, upward compatibility with existing

PLX PCI I/O accelerators is maintained. The 9080 continues the PLX tradition of

providing the highest performance and fully compatible PCI interface solutions.

Features

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PCI Version 2.1 compliant

Bus Master interface chip for

adapters and embedded

systems

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Programmable local bus

supports nonmultiplexed

32-bit address/data, multi-

plexed 32- or 16-bit, and

accesses of 32-, 16-, or 8-bit

local bus devices

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I2O compatible messaging unit

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3.3 or 5 volt PCI signaling,

5 volt core, low-power

CMOS in 208-pin PQFP

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Two independent program-

mable DMA channels for local

bus memory to/from PCI host

bus data transfers

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Eight programmable FIFOs

for zero wait state burst

operation

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PCI to/from local data

transfers up to 133MB/sec

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Local bus runs asynchro-

nously to the PCI bus

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Eight 32-bit mailbox and two

32-bit doorbell registers

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Performs Big Endian/Little

Endian conversion

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Upward compatibility with

PCI 9060, 9060ES, 9060SD