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DSP56303 датащи(PDF) 258 Page - Freescale Semiconductor, Inc

номер детали DSP56303
подробное описание детали  DSP56303 USER?셎 MANUAL
PDF  292 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56303 датащи(HTML) 258 Page - Freescale Semiconductor, Inc

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DSP56303 User’s Manual, Rev. 2
B-14
Freescale Semiconductor
Programming Reference
Figure B-5. Bus Control Register (BCR)
Bus Interface Unit
Bus Control Register (BCR)
Reset = $1FFFFF
Bus State, Bit 21
0 = DSP is not bus master
Area 0 Wait Control, Bits 4– 0
Default Area Wait Control, Bits 20–16
1 = DSP is bus master
Area 3 Wait Control, Bits 15–13
Area 2 Wait Control, Bits 12–10
Bus Request Hold, Bit 23
0 = BR pin is asserted only for attempted
1 = BR pin is always asserted
or pending access
NOTE: All BCR bits are read/write control bits.
These read/write control bits define
the number of wait states inserted
into each external SRAM access to
the designated area. The value of
these bits should not be programmed
as zero.
Area 1 Wait Control, Bits 9–5
Application:
Date:
Programmer:
Sheet 1 of 2
Bits
Bit Name
# of Wait States
20–16
BDFW[4–0]
0–31
15–13
BA3W[2–0]
0–7
12–10
BA2W[2–0]
0–7
9–5
BA1W[4–0]
0–31
4–0
BA0W[4–0]
0–31
15 14 13 12 11 10
987654
3210
19 18 17 16
23 22 21 20
BRH
BBS
BDFW[4–0]
BA3W[2–0]
BA2W[2–0]
BA1W[4–0]
BA0W[4–0]
X:$FFFFFB Read/Write
*0
* = Reserved, Program as 0



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