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Advanced Low Power Schottky Logic - 74ALS174

Rev 1.1

20/01/24

AC Electrical Characteristics4 T

J = -40°C to 85°C unless otherwise specified

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

MIN

TYP

MAX

UNITS

Maximum Clock

Frequency

fmax

5V ±10%

CL = 50pF,

RL = 500Ω

50

-

-

MHz

tPLH,

5

-

18

Maximum

Propagation Delay,

CLR to Q

(Figure 1)

tPHL

5V ±10%

CL = 50pF,

RL = 500Ω

8

-

23

ns

tPLH,

3

-

15

Maximum

Propagation Delay,

CLK to Q

(Figure 1)

tPHL

5V ±10%

CL = 50pF,

RL = 500Ω

5

-

17

ns

4. Not production tested in die form, characterized by chip design and tested in package.

Timing Requirements4 T

J = -40°C to 85°C unless otherwise specified

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

MIN

TYP

MAX

UNITS

Minimum Pulse

Width, CLK

(Figure 3)

tw(H), tw(L),

5V ±10%

CL = 50pF,

RL = 500Ω

10

-

-

ns

Minimum Pulse

Width, CLR

(Figure 3)

tw(L)

5V ±10%

CL = 50pF,

RL = 500Ω

10

-

-

ns

Minimum Setup

Time Before CLK

(Figure 2)

tSU

5V ±10%

Data,

CL = 50pF,

RL = 500Ω

10

-

-

ns

Minimum Setup

Time Before CLK

(Figure 2)

tSU

5V ±10%

CLR Inactive,

CL = 50pF,

RL = 500Ω

6

-

-

ns

Hold Time,

Data after CLK

(Figure 2)

th

5V ±10%

CL = 50pF,

RL = 500Ω s

0

-

-

ns