High Speed CMOS Logic – 54HC393

 

 

DC Electrical Characteristics Continued (Voltages referenced to GND)

Rev 1.0

7/5/2019

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

FULL RANGE

4

25°C

85°C

 

UNITS

2V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AC Electrical Characteristics5

1.9

1.9

1.9

4.5V

4.4

4.4

4.4

6.0V

VIN = VIH or VIL

V

│IOUT│≤ 20µA

5.9

5.9

5.9

4.5V

VIN = VIH or VIL

│IOUT│≤ 4.0mA

3.98

3.84

3.70

Minimum High-Level

Output Voltage

VOH

6.0V

VIN = VIH or VIL

│IOUT│≤ 5.2mA

5.48

5.34

5.20

V

2V

0.1

0.1

0.1

4.5V

0.1

0.1

0.1

6.0V

VIN = VIH or VIL

│IOUT│≤ 20µA

0.1

0.1

0.1

V

4.5V

VIN = VIH or VIL

│IOUT│≤ 4.0mA

0.26

0.33

0.40

V

Maximum Low-Level

Output Voltage

VOL

6.0V

VIN = VIH or VIL

│IOUT│≤ 5.2mA

0.26

0.33

0.40

V

Maximum Input

Leakage Current

IIN

6.0V

VIN = VCC or

GND

±0.1

±1.0

±1.0

µA

Maximum Quiescent

Supply Current

ICC

6.0V

VIN = VCC or

GND,

IOUT = 0µA

8

80

160

µA

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

4

UNITS

2V

5.4

4.4

3.6

4.5V

27

22

18

Maximum Clock

Frequency

(50% Duty Cycle)

(Figure 1, 3)

fMAX

6.0V

CL = 50pF,

Input

tr = tf = 6ns

32

26

21

MHz

2V

120

150

180

4.5V

24

30

36

Maximum Propagation

Delay, Clock to Q0

(Figure 1, 3)

tPLH, tPHL

6.0V

CL = 50pF,

Input

tr = tf = 6ns

20

26

31

ns

2V

190

240

285

4.5V

38

48

57

Maximum Propagation

Delay, Clock to Q1

(Figure 1, 3)

tPLH, tPHL

6.0V

CL = 50pF,

Input

tr = tf = 6ns

32

41

48

ns

2V

240

300

360

4.5V

48

60

72

Maximum Propagation

Delay, Clock to Q2

(Figure 1, 3)

tPLH, tPHL

6.0V

CL = 50pF,

Input

tr = tf = 6ns

41

51

61

ns

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