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MP8690 датащи(PDF) 4 Page - Monolithic Power Systems |
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MP8690 датащи(HTML) 4 Page - Monolithic Power Systems |
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4 / 14 page ![]() MP86905 – INTELLI-PHASE SOLUTION W/ INTEGRATED MOSFETS AND DRIVERS MP86905 Rev. 1.1 www.MonolithicPower.com 4 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS VIN = 12V, VDRV = VDD = EN = 3.3V, TA = 25°C for typical value and TJ = -40°C to 125°C for max and min values, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units IIN shutdown IVIN Off EN = low 40 μA VIN under-voltage lockout threshold rising 2.5 3.0 V VIN under-voltage lockout threshold hysteresis 540 600 660 mV IVDRV quiescent current EN = low 15 μA PWM = low 80 μA IVDD quiescent current EN = low 45 μA PWM = low 4 5 mA VDD voltage UVLO rising 2.8 2.9 V VDD voltage UVLO hysteresis 120 250 380 mV VDRV voltage UVLO rising 2.75 2.9 V VDRV voltage UVLO hysteresis 360 400 440 mV High-side current limit(4) ILIM_FLT Cycle-by-cycle up to four cycles 75 A Low-side current limit(4) Negative current limit, cycle-by-cycle, no fault report -30 A Negative current limit low-side off time(4) 40 ns High-side current limit shutdown counter(4) 4 times EN input low threshold voltage 0.95 1.0 1.05 V EN input high threshold voltage 1.15 1.2 1.25 V Dead time rising(4) 3 ns Dead time falling(4) Positive inductor current 6 ns Negative inductor current 35 ns SYNC internal pull-down resistor RSYNC 100 k Ω SYNC logic high voltage 2 V SYNC logic low voltage 0.8 V PWM high-to-SW rising delay(4) tRising 15 ns PWM low-to-SW falling delay(4) tFalling 15 ns PWM tri-state to SW Hi-Z delay(4) tLT 40 ns tTL 20 ns tHT 40 ns tTH 20 ns |
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