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GL800HT25 датащи(PDF) 12 Page - GENESYS LOGIC |
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GL800HT25 датащи(HTML) 12 Page - GENESYS LOGIC |
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12 / 20 page ![]() GL800HT25 USB 2.0 UTMI Compliant Transceiver IP Core ©2000-2003 Genesys Logic Inc.—All rights reserved. Page 12 4.2 Pin List Table 4.1 - Pin List Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type 1 FSPEED I 13 AVDD1 P 25 VALIDH B 37 D8 B 2 HRST# I 148 XO B 26 TXRDY O 38 D9 B 3 HSTERM# I 15 XI I 27 D0 B 39 D10 B 4 SUSPND# I 16 AGND1 P 28 D1 B 40 D11 B 5 RPU - 17 TEST0 I 29 D2 B 41 DVDD1 P 6 AVDD0 P 18 OPMOD1 I 30 D3 B 42 DGND1 P 7 DPF B 19 OPMOD0 I 31 DVDD0 P 43 D12 B 8 DPH B 20 RXACTV O 32 DGND0 P 44 D13 B 9 DMF B 21 RXERR O 33 D4 B 45 D14 B 10 DMH B 22 RXVLD O 34 D5 B 46 D15 B 11 AGND0 P 23 CLKOUT O 35 D6 B 47 LINEST1 O 12 RREF - 24 TXVLD I 36 D7 B 48 LINEST2 O 4.3 Pin Descriptions Table 4.2 - Pin Descriptions Pin Name Pin# Type Description FSPEED 1 I (pu) Transceiver Select. This signal selects between the FS and HS transceivers: 0: High Speed transceiver enabled 1: Full Speed transceiver enabled HRST# / ADVDD 2 I (pu) UMC 0.35um sample: Reset. Chip reset Input, active low. This signal is used to reset all state machines in the GL800HT25. TSMC 0.25um sample: this pin should be digital 2.5V power for transceiver. HSTERM# 3 I (pu) Termination Select. HS termination enable, active low SUSPND# 4 I (pd) Suspend mode enable, active low. This signal places the GL800HT25 in a mode that draws minimal power from supplies. Shuts down all blocks not necessary for Suspend/Resume operation. While suspended, HSTERM# must always be disabled (FS Mode) to ensure that the 1.5K pull-up on DP remains powered. RPU 5 - 3.3V Pull up control for DPF AVDD0~1 6,13 P Positive analog supply (3.3V) DPF 7 B Positive USB differential data (Full Speed) DPH 8 B Positive USB differential data (High Speed) DMF 9 B Negative USB Differential Data (Full Speed) |
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