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TQL850CSV33 датащи(PDF) 6 Page - Taiwan Semiconductor Company, Ltd

номер детали TQL850CSV33
подробное описание детали  50V, 500mA, Low-IQ 40μA Low-Dropout Linear Regulator with Enable, Reset, Watchdog Functions
PDF  13 Pages
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производитель  TSC [Taiwan Semiconductor Company, Ltd]
домашняя страница  http://www.taiwansemi.com
Logo TSC - Taiwan Semiconductor Company, Ltd

TQL850CSV33 датащи(HTML) 6 Page - Taiwan Semiconductor Company, Ltd

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TQL850CSV33
Taiwan Semiconductor
6
Version: B2207
APPLICATION INFORMATION
TQL850CSV33 is a high-performance low dropout voltage regulator. The device operates with a wide input voltage
from 3V to 50V and up to 500mA of output current. It also provides a high accuracy output voltage for ±2% in all the
load and line regulation.
Reset
The TQL850CSV33 is monitored by Reset system including Power-ON Delayed Reset, Under-Voltage Reset, and
Reset Threshold Adjustment. When reset is activated, the RO/WDO pin is low.
◼ Power-ON Delayed Reset
When device starts up, the RO/WDO pin delays to become “High” in Power-ON Delayed Time (tRD) without
reset issue.
◼ Under-Voltage Reset
When the output supply voltage drops below UVLO Reset Lower Threshold (VRTL), the RO/WDO switches from
“High” to “Low”. The RO/WDO pin is an open collector output with an internal pull-up resistor.
◼ Reset Threshold Adjustment
The UVLO Reset Lower Threshold can be adjusted. If the RTH pin connects to GND, the threshold voltage is
default value (VRTL). We can take two resistors (Rth1, Rth2) to adjust under-voltage threshold. The Rth1 is
connected between OUT pin and RTH pin and Rth2 is connected between RTH and GND. The reminder is
taking proper resistance for current sourcing. The new threshold voltage is calculated as follows:
VRTL,new = VRTTH x (Rth1 + Rth2) / Rth2
VRTL,new : Desired switching threshold
Rth1, Rth2 : External divider resistors
VRTTH : Reset adjust switching threshold
Watchdog
The TQL850CSV33 has the watchdog function with fixed watchdog timing to monitor microcontroller process. The
device monitors the period clock-pulse provided by Microcontroller at WDI pin in a certain timing (Watchdog Trigger
Time, tWDI,tr). If
there is no signal in Watchdog Trigger Time, the RO/WDO pin becomes “Low” in a certain time
(Watchdog Low Time, tWDOL
). After that, the RO/WDO pin returns to “High” and keep watching the WDI signal
repeatedly. The RO/WDO pin is an open collector output with an internal pull-up resistor.
The Watchdog function is inactivated by WDI pin. While the WDI voltage is in 1.15V to 1.4V, the Watchdog function
is disable.
Typical Watchdog Timing Diagram, Watchdog and Reset Modes
Ignore Time
Don’t care W I
during t
rd
and ignoret im e
tWDOL
t
WI,I
Trigger
V
WI
WD Trigger
t
V
RO/WDO
t
Normal operation
t
V
I
V
OUT
V
RTH
t
t
RR
48ms *)
NO WDTrigger
48ms *)
WD Trigger
48ms *)
WD Trigger
Normal operation
V
RTL
Don’t care W DI
during t
WDO,low
and
ignore time
t
48ms *)
48ms *)
48ms *)
WD Trigger
WD Trigger
WD Trigger
t
RD
Ignore Time
tWDI,i
Don’t care WDI
t
RD
and ignore time
Power
Fail
t
RD



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