HT82K94E/HT82K94A

Rev. 1.50

22

October 11, 2007

USB Endpoint Interrupt Status Register

The register is used to indicate which endpoint is accessed or has external interrupt PA4/EXT is activated and to select

the serial bus (PS2 or USB). The endpoint request flags (EP0IF, EP1IF, EP2IF, EP3IF and EXTIF) are used to indicate

which endpoints are accessed. If an endpoint is accessed, the related endpoint request flag will be set to

²1² and the

USB interrupt will occur (if the USB interrupt is enabled and the stack is not full). When the active endpoint request flag

is served, the endpoint request flag has to be cleared to

²0².

Where USB_flag bit is only a bit for firmware to store the USB-mode data. This bit only clear to zero after power-on reset.

Bit No.

Label

R/W

Function

0

EP0IF

R/W

When this bit is set to

²1² (set by the SIE), it indicates the endpoint 0 is accessed and

a USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

1

EP1IF

R/W

When this bit is set to

²1² (set by the SIE), it indicates the endpoint 1 is accessed and

a USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

2

EP2IF

R/W

When this bit is set to

²1² (set by the SIE), it indicates the endpoint 2 is accessed and

a USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

3

EP3IF

R/W

When set to

²1², indicated endpoint 3 interrupt event . Must wait MCU to process in-

terrupt event, then clear this bit by firmware. This bit must be 0, then next interrupt

event will be process. Default value is 0.

4

SPS2

R/W

The PS2 function is selected when this bit is set to

²1². (Default=²0²)

5

SUSB

R/W

The USB function is selected when this bit is set to

²1². (Default=²0²)

6

¾¾

Undefined, should be cleared to

²0²

7

USB_flag

R/W

This flag is used to show the MCU is in USB mode. (Bit=1)

This bit is R/W by FW and will be cleared to

²0² after power-on reset. (Default=²0²)

USR (1DH) Register

System Clock Control Register

This register is designed to control the system clock and make the device to meet USB 500

mA suspend current spec. as

well as a LVD indicator.

Since the device can operate at 6MHz or 12MHz in USB mode, so in order to make SIE work properly, there should has

a SYSCLK bit to indicate what system frequency is working.

The USBCKEN bit is used to turn-off or turn-on the SIE system clock to meet the USB 500

mA suspend current. For

normal operation, this bit must be 1. Otherwise, the SIE cannot detect the USB signal.

PS2_flag bit is only a bit for firmware to store the PS2 mode data. This bit only clear to zero by hardware after power-on

reset. SUSPEND2 bit is used to second suspend mode.