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POWER MANAGEMENT

SC905A

flexibility, in that once the slave address has been sent to the SC905A enabling it to be a slave transmitter/receiver, any

register can be written or read independently of each other. While there is no auto increment/decrement capability in

register you begin accessing. The start and stop commands frame the data-packet and the repeat start condition is

allowed if necessary.

Seven bit addressing is used and ten bit addressing is not allowed. Any general call address will be ignored by the

SC905A. The SC905A is not CBUS compatible. The SC905A can operate in standard mode (100kbit/s) or fast mode

(400kbit/s).

Supported Formats

Direct Format - Write

responds with an 8-bit data byte consisting of the register address. The slave acknowledges and the master sends

the appropriate 8-bit data byte. Once again the slave acknowledges and the master terminates the transfer with the

stop condition [P].

Combined Format - Read

acknowledges that it is being addressed, and the master responds with an 8-bit data byte consisting of the register

address. The slave acknowledges and the master sends the repeated start condition [Sr]. Once again, the slave

address is sent, followed by an eighth bit indicating a read. The slave responds with an acknowledge and the previously

addressed 8-bit data byte; the master then sends a non-acknowledge (NACK). Finally, the master terminates the

transfer with the stop condition [P].

Slave Address

Register Address

Data

SW A

AA P

S: Start Condition

Slave Address: 7-bit

W: Write = ‘0’

Register Address: 8-bit

A: Acknowledge (sent by slave)

Data: 8-bit

P: Stop condition

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Slave Address

Register Address

Slave Address

Data

NACK

S

WA

A Sr

R A

P

S: Start Condition

Slave Address: 7-bit

W: Write = ‘0’

Register Address: 8-bit

R: Read = ‘1’

Data: 8-bit

A: Acknowledge (sent by slave)

NACK: Non-Acknowledge (sent by master)

Sr: Repeated Start Condition

P: Stop condition

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