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SC905 датащи(PDF) 15 Page - Semtech Corporation |
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SC905 датащи(HTML) 15 Page - Semtech Corporation |
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15 / 21 page ![]() 15 © 2006 Semtech Corp. www.semtech.com POWER MANAGEMENT SC905 Analog LDO Voltage Table B The bit code controls the output voltage of each LDO. The LSB size at the output is 50mV. Output voltage can be set by writing the proper code to the desired LDO register. See Table B for the bitcodes and their corresponding voltages. TABLE B - Output Voltage Code Bits for LDOs VANA, VTCXO, VTX, VRX, VPLL X2 X1 X0 LDO Output Voltage 0 0 0 2.55V 0 0 1 2.60V 0 1 0 2.65V 0 1 1 2.70V 1 0 0 2.75V 1 0 1 2.80V 1 1 0 2.85V 1 1 1 2.90V The I2C General Specification The SC905 is a read-write slave-mode I2C device and complies with the Philips I2C standard Version 2.1 dated January, 2000. The SC905 has eight user-accessible internal 8-bit registers. The I2C interface has been designed for program flexibility, in that once the slave address has been sent to the SC905 enabling it to be a slave transmitter/receiver, any register can be written or read independently of each other. While there is no auto increment/decrement capability in the SC905 I2C logic, a tight software loop can be designed to randomly access the next register independent of which register you begin accessing. The start and stop commands frame the data-packet and the repeat start condition is allowed if necessary. SC905 Limitations to the I2C specifications: Seven bit addressing is used and ten bit addressing is not allowed. Any general call address will be ignored by the SC905. The SC905 is not CBUS compatible. The SC905 can operate in standard mode (100kbit/s) or fast mode (400kbit/s). Supported Formats: Direct Format - Write The simplest format for an I2C write is given below. After the start condition [S], the slave address is sent, followed by an eighth bit indicating a write. The SC905 I2C then acknowledges that it is being addressed, and the master re- sponds with an 8 bit data byte consisting of the register address. The slave acknowledges and the master sends the appropriate 8 bit data byte. Once again the slave acknowledges and the master terminates the transfer with the stop condition [P]. Register Map (Cont.) |
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