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TMP110 датащи(PDF) 17 Page - Texas Instruments |
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TMP110 датащи(HTML) 17 Page - Texas Instruments |
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17 / 44 page ![]() SCL SDA Data Transfer START Condition STOP Condition Figure 7-5. Definition of Start and Stop Conditions Byte: 1010 1010 (AAh) MSB SCL SDA Bit Bit Bit Bit Bit Bit LSB ACK 1 0 1 0 1 0 1 0 ACK SDA line is stable while SCL line is high Figure 7-6. Bit Transfer 7.5.3 Device Address To communicate with the TMP113, the controller must first address target devices through an address byte. The address byte has seven address bits and a read-write (R/W) bit that indicates the intent of executing a read or write operation. The TMP113 features an address pin to allow up to four TMP113 devices to be addressed on a single bus simultaneously. Table 7-5 describes the pin logic levels used to properly connect up to four devices on the same I2C bus. www.ti.com TMP113 SBOSAJ5 – DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TMP113 |
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