HT46R01 datasheet(34/60 Pages) HOLTEK

34 / 60 page

HT46R01/HT46R02/HT46R03

Rev. 1.00

September 21, 2007

I N T C 1 R e g i s t e r

H T 4 6 R 0 2 / H T 4 6 R 0 3

b 7

b 0

E A D I

A D F

A / D C o n v e r t e r I n t e r r u p t E n a b l e

1 : e n a b l e

0 : d i s a b l e

N o t i m p l e m e n t e d , r e a d a s ' ' 0 ' '

A / D C o n v e r t e r R e q u e s t F l a g

INTC1 Register

- HT46R02/HT46R03

Interrupt Operation

A Timer/Event Counter overflow, an end of A/D conver-

sion or an active edge on the external interrupt pin will all

generate an interrupt request by setting their corre-

sponding request flag, if their appropriate interrupt en-

able bit is set. When this happens, the Program

Counter, which stores the address of the next instruction

to be executed, will be transferred onto the stack. The

Program Counter will then be loaded with a new ad-

dress which will be the value of the corresponding inter-

rupt vector. The microcontroller will then fetch its next

instruction from this interrupt vector. The instruction at

this vector will usually be a JMP statement which will

jump to another section of program which is known as

the interrupt service routine. Here is located the code to

control the appropriate interrupt. The interrupt service

routine must be terminated with a RETI statement,

which retrieves the original Program Counter address

from the stack and allows the microcontroller to continue

with normal execution at the point where the interrupt

occurred.

The various interrupt enable bits, together with their as-

sociated request flags, are shown in the following dia-

gram with their order of priority.

Once an interrupt subroutine is serviced, all the other in-

terrupts will be blocked, as the EMI bit will be cleared au-

tomatically. This will prevent any further interrupt nesting

from occurring. However, if other interrupt requests oc-

cur during this interval, although the interrupt will not be

immediately serviced, the request flag will still be re-

corded. If an interrupt requires immediate servicing

while the program is already in another interrupt service

routine, the EMI bit should be set after entering the rou-

tine, to allow interrupt nesting. If the stack is full, the in-

terrupt request will not be acknowledged, even if the

related interrupt is enabled, until the Stack Pointer is

decremented. If immediate service is desired, the stack

must be prevented from becoming full.

A u t o m a t i c a l l y C l e a r e d b y I S R

M a n u a l l y S e t o r C l e a r e d b y S o f t w a r e

E x t e r n a l I n t e r r u p t

R e q u e s t F l a g E I F

T i m e r / E v e n t C o u n t e r 0

I n t e r r u p t R e q u e s t F l a g T 0 F

T i m e r / E v e n t C o u n t e r 1

I n t e r r u p t R e q u e s t F l a g T 1 F

E E I

E T 0 I

E T 1 I

E M I

A u t o m a t i c a l l y D i s a b l e d b y I S R

C a n b e E n a b l e d M a n u a l l y

P r i o r i t y

H i g h

L o w

I n t e r r u p t

P o l l i n g

A / D C o n v e r t e r

I n t e r r u p t R e q u e s t F l a g A D F

E A D I

Interrupt Scheme

Note:

In the figure, the T1F interrupt request flag and the ET1I interrupt enable bit only exist for the

HT46R02/HT46R03 devices, which have two timers.

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