440SP datasheet(66/85 Pages) AMCC

66 / 85 page

PowerPC 440SP Embedded Processor

AMCC Proprietary

Revision 1.23 - Sept 26, 2006

Data Sheet

Input Max Allowable Overshoot (3.3V LVTTL)

VIMAO

+3.9

Input Max Allowable Undershoot (3.3V LVTTL)

VIMAU

-0.6

Output Max Allowable Overshoot (3.3V LVTTL)

VOMAO

+3.9

Output Max Allowable Undershoot (3.3V

LVTTL)

VOMAU3

-0.6

Case Temperature

-40

+100

°C6

Notes:

1. PCI-X drivers meet PCI-X specifications.

2. SVREF = SVDD/2

3. The analog voltages used for the on-chip PLLs can be derived from the logic voltage, but must be filtered before entering the

PPC440SP. See “Absolute Maximum Ratings” on page 63.

4. Power supply sequencing: It is recommended that the 1.5V Vdd of the core reach its nominal value before applying power to the

I/Os. Voltage applied to I/Os from an external source must not be allowed to exceed the 0Vdd ramp. A power down cycle must

complete (0Vdd and Vdd are below 0.4V) before a new power up cycle is started.

5. LPDL is least positive down level; MPUL is most positive up level.

6. Case temperature, TC, is measured at top center of case surface with device soldered to circuit board.

Table 10. Input Capacitance

Parameter

Symbol

Maximum

Unit

Notes

Group 1 (2.5V SSTL I/O)

CIN1

5.2

Group 2 (3.3V LVTTL I/O)

CIN2

7.1

Group 3 (PCI-X I/O)

CIN3

5.7

Group 4 (Receivers)

CIN4

6.9

Group 5 (3.3V tolerant CMOS I/O)

CIN5

3.4

Table 9. Recommended DC Operating Conditions (Sheet 3 of 3)

Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended

conditions can affect device reliability.

Parameter

Symbol

Minimum

Typical

Maximum

Unit

Notes

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