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M68ICS08KX датащи(PDF) 35 Page - Motorola, Inc |
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M68ICS08KX датащи(HTML) 35 Page - Motorola, Inc |
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35 / 77 page ![]() Support Information KXICS Theory of Operation M68ICS08KX In-Circuit Simulator User’s Manual MOTOROLA Support Information 35 When the jumper is set for the PTB6 position, the MCU runs from it’s internal clock and pin PTB6 of the MCU is connected to the target connector. When the jumper is set for the CLK position, the Y1 external clock signal from the KXICS board is applied to the PTB6 pin of the MCU for timing. (An internal MCU register must be set to control the selection of internal or external clock.) The external clock, Y1, has an output frequency of 9.8304 MHz to allow the MCU to communicate at 9600 baud. It is socketed to allow the use of a full-size or half-size clock. You may change clock frequencies by installing a new clock chip, however the serial communication rate proportionally changes. W3 may be used to disable the external clock. Additionally, the on-board clock is available as an output on the 3-pin header J4 for target or computer host clock synchronization. 3.4.4 Start-Up in Monitor Mode Following power up the ICS_RST# is held low for a period of time by U8. When ICS_RST* is asserted high, the binary ripple counter, U3, counts up 1024 clock cycles prior to allowing DELAY RESET to be asserted. The delayed reset controls the analog switch, U7, connected to PTA1 and PTB[0...1]. The RTS signal is held high which places the VTST voltage as the high voltage for IRQ*. Analog switch, U7, connects PTA1 to common, PTB0 to VDD_MCU, and PTB1 to common until DELAY_RESET is asserted. VTST is held above VDD-MCU +3Vdc during the reset release forcing the KXICS board to power up in the Monitor Mode. Following the counter time-out, the analog switch, U7, is toggled so that the PTA1 and PTB[0...1] pins of the board are connected to the target head connectors. Following entry into monitor mode, you may switch the IRQ* voltage to VDD_MCU by setting RTS low. The analog switch, U14, will switch the connection of MCU pin 9 from the ICS reset circuitry to a connection to the target head connector. Be aware that beside disabling the use of external resets of the MCU, internal MCU features, e.g., the COP must be serviced properly in this mode. |
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