MIC2132 datasheet(16/48 Pages) MICROCHIP

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MIC2132

DS20006654B-page 16

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3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

Number

Symbol

Description

CSN2

Current Sense Return pin for Phase 2. Connect Kelvin connection from the low-side FET

source to CSN2 to avoid ground drops due to high current.

CSP2

Current Sense Positive pin for Phase 2. Connect Kelvin connection from the low-side FET

drain to CSP2 to avoid ground drops due to high current.

CSN1

Current Sense Return pin for Phase 1. Connect Kelvin connection from the low-side FET

source to CSN1 to avoid ground drops due to high current.

CSP1

Current Sense Positive pin for Phase 1. Connect Kelvin connection from the low-side FET

drain to CSP1 to avoid ground drops due to high current.

ILIM

Current Limit Adjust Input pin. Connect a resistor from ILIM to AGND to set the current limit.

Refer to Section 4.5.2 “Current Limit” for more details. Both channels share the same

current limit threshold. When connected in a stackable application, all ILIM pins are tied

together, sharing common resistor sized for voltage drop, corresponding to current limit per

phase.

CSH

Average Current Sense Voltage Output pin. Used for current sharing; see Section 4.5.1

“Current Balancing Between Phases” and Section 4.5.9 “Adaptive Voltage Positioning

(AVP), also Known as Droop Function (Recommended for CCM Only)”. Connect 100 pF

capacitor from CSH to AGND. In stackable application, tie all CSH pins together.

Active-High Enable Input pin. 75V compatible with 1.2V precise threshold. Pull EN to GND to

disable the buck converter output. Connect to VIN for always-on operation. EN can be used

for power sequencing and as a UVLO adjustment input. For a precision UVLO, put an

appropriately sized resistor divider from VIN to AGND and tie the midpoint to the EN pin.

VIN

Input Voltage to Controller pin. Connect to VIN through 1.21Ω resistor. Connect 1 µF

capacitor from this pin to PGND.

VDD

5V LDO Output pin. Bias supply for the MIC2132 control logic circuit. Connect a minimum

2.2 µF low-ESR ceramic capacitor from VDD to AGND.

AGND

Analog Ground pin. Reference node for all the control logic circuits inside the MIC2132.

Connect AGND to PGND at one point.

EXTVDD

Auxiliary LDO Input pin. Connect to a supply higher than 4.7V (typ) to bypass the internal

high-voltage 5V LDO or leave unconnected/connected to ground when the EXTVDD pin is

not used. Connect a 2.2 µF low-ESR ceramic capacitor between EXTVDD and AGND.

EXTVDD can be connected to an external supply.

NPI

Next Phase Input pin. Connect APO of previous MIC2132 to NPI for multiphase operation.

APO

Active Phase Output pin. Connect APO to the next MIC2132 NPI pin for multiphase

operation.

ONR

On-Time Request pin. It is an input or an output pin. Connect the ONR pins of all MIC2132

devices connected for multiphase operation. It is an output for the host and an input for the

secondaries. The ONR output on the host has a pull-up capability of ~1 kΩ. When FBS is

connected to VDD, it is an input (secondary).

OUTS

Output Voltage Sense pin. It is required to connect the OUTS pin to output through a 10 kΩ

resistor and decouple to ground with a 100 nF capacitor directly for VOUT ≤ 5V. For

VOUT > 5V, it is required to connect the OUTS pin through a resistive divider from VOUT to

AGND. The OUTS pin will set the correct frequency adaptive to the output voltage.

BST1

Phase 1 Bootstrap Capacitor Connection pin. The BST1 pin is the supply voltage input for

the Phase 1 high-side MOSFET driver. Connect a 0.1 µF low-ESR ceramic capacitor

between the BST1 pin and the SW1 pin.

DH1

Phase 1 High-Side Gate Driver Output pin. Connect DH1 to the Phase 1 high-side

MOSFET gate.

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