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MCP16501 датащи(PDF) 30 Page - Microchip Technology

номер детали MCP16501
подробное описание детали  Cost and Size Optimized PMIC for SAMA5DX/SAM9X6/SAM9X7/SAMA7G Series MPUs
PDF  42 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP16501 датащи(HTML) 30 Page - Microchip Technology

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MCP16501
DS20006388E-page 30
 2020-2022 Microchip Technology Inc. and its subsidiaries
5.5.1
OVERCURRENT PROTECTION
(BUCK CHANNELS)
The overcurrent protection consists of a cycle-by-cycle,
high-side current limit with digital filtering, followed by
the Hiccup mode for protection against short-circuit
conditions.
The cycle-by-cycle, high-side current limit includes
frequency
foldback.
Because
of
Leading-Edge
Blanking (LEB) in Peak Current mode control,
frequency foldback (with a factor = 4) is used to allow
more time for inductor discharge and prevent current
runaway in a deep overload condition.
Frequency foldback operation is entered when:
1.
A high-side current limit event has been
detected; and
2.
The feedback voltage is less than 500 mV
(typical).
Cycle-by-cycle overcurrent protection with frequency
foldback is always active and it is the first current limit
protection mechanism.
The second current limit mechanism is Hiccup mode
protection, which is also always enabled, including
during the soft start ramp.
Since the Hiccup mode protection is also active during
soft start, there will be a limitation on the maximum
simultaneous DC and capacitive loading to ensure that
the Hiccup mode protection will not be engaged during
the soft start ramp. This is further explained in
Section 5.6 “Maximum Simultaneous Capacitive
and DC Loading in Soft Start”.
Hiccup mode is invoked based on digital counting of
High-Side Overcurrent (HS OC) events, regardless of
the frequency at which they take place (full switching
frequency or foldback switching frequency).
Each time the overcurrent protection detects a
high-side current limit event, the current on-time is
terminated and a HS OC event counter is incremented.
The length of the counter is four bits.
If the counter reaches its End-of-Count (EOC) while the
instantaneous value of the POK signal is still low, the
Buck converter is turned off (both high-side and
low-side transistors are turned off) and Hiccup mode
protection is triggered.
The intervention of Hiccup mode on any of the Buck
channels can have two different behaviors, depending
on the HCPEN status of the channel affected by
overcurrent conditions. By default, all device options of
the MCP16501 come with HCPEN enabled, with the
exception of MCP16501D.
If HCPEN is disabled, the intervention of Hiccup mode
will immediately terminate the power delivery on all
channels, including LDO. At the same time, nRSTO will
be asserted low.
After a 100 ms delay, the MCP16501D will automati-
cally attempt a new start-up sequence without the need
of an external Start condition (from nSTRT or
PWRHLD).
If HCPEN is enabled, the intervention of Hiccup mode
only affects the responsible Buck channel. All other
channels will continue to operate normally. If the
affected channel is part of the power-up sequence,
nRSTO will be asserted low.
The affected channel will be kept off for a certain
Hiccup time (tHICCUP), which corresponds to 3x soft
start time on that channel, and after the Hiccup time, a
new soft start is attempted.
If the short-circuit condition is removed and the affected
channel resumes normal operation, nRSTO will be
asserted high after the Reset delay (t4).
The HS OC event counter is reset only after
15 consecutive HS turn-on pulses without any
overcurrent event. This counting is done by the Reset
counter.
Note that all counting is switching event-based, so it is
not relevant if the switching takes place at fsw or at fsw/4
(i.e., in frequency foldback).
The Hiccup mode flowchart is detailed in Figure 5-1.



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