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PCM4220PFB датащи(PDF) 27 Page - Texas Instruments |
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PCM4220PFB датащи(HTML) 27 Page - Texas Instruments |
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27 / 34 page ![]() www.ti.com INTERFACING TO DIGITAL AUDIO TRANSMITTERS (AES3, IEC60958-3, and S/PDIF) PCM4220 Dividedby2 FS1 LO LO HI HI FS0 LO HI LO HI Mode Normal DoubleSpeed QuadSpeed Reserved MCKI BCK LRCK FS1 FS0 MCLK CLK0 CLK1 512f (Normal) S 256f (DoubleSpeed) S 128f (QuadSpeed) S DIT4192 Master Clock DATA S/M SCLK SYNC SDATA M/S LO= ADCMaster HI= ADCSlave CLK1 LO LO HI HI CLK0 LO HI LO HI Mode QuadSpeed DoubleSpeed Reserved Normal PCM4220 SBAS407A – DECEMBER 2006 – REVISED MAY 2007 The serial output of audio analog-to-digital converters is oftentimes interfaced to transmitter devices that encode the serial output data to either the AES3 or IEC60958-3 (or S/PDIF) interface formats. Texas Instruments manufactures several devices that perform this encoding, including the DIT4192, DIX4192, SRC4382, and SRC4392. This section describes and illustrates the audio serial port interface connections required for communications between the PCM4220 and these devices. Register programming details for the DIX4192 and SRC4382/4392 are also provided. Figure 48 shows the interface between a PCM4220 and a DIT4192 transmitter. This configuration supports sampling frequencies and encoded frame rates from 8kHz to 216kHz. For this example, the audio data format must be either Left-Justified or I2S; TDM formats are not supported by the DIT4192. In addition, the PCM4220 VDD supply and DIT4192 VIO supply must be the same voltage, to ensure logic level compatibility. Figure 49 illustrates the audio serial port interface between the PCM4220 and either a DIX4192 transceiver or SRC4382/SRC4392 combo sample rate converter/transceiver device. Port A of the DIX4192 or SRC4382/SRC4392 is utilized for this example. Data acquired by Port A are sent on to the DIT function block within the interface device for AES3 encoding and transmission. The DIX4192 and SRC4382/SRC4392 are software-configurable, with control register and data buffer settings that determine the operation of internal function blocks. Table 8 and Table 9 summarize the control register settings for the Port A and the DIT function blocks for both A/D Converter Master and Slave modes, respectively. Input sampling and encoded frame rates from 8kHz to 216kHz are supported with the appropriate register settings. Figure 48. Interfacing the PCM4220 to a DIT4192 27 Submit Documentation Feedback |
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