PM5352 datasheet(18/77 Pages) PMC

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PM5352 S/UNI STAR

DATA SHEET

PMC-1990421

ISSUE 2

SATURN USER NETWORK INTERFACE 155 (STAR)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

6.2

Section and Line Status DCC Signals

Pin Name

Type

No.

Function

RSD

Output

AB18

The receive section DCC (RSD) signal contains the

section data communications channel (D1-D3)

RSDCLK

Output

AC21

The receive section DCC clock (RSDCLK) is used

to clock out the section DCC.

RSDCLK is a 192 kHz clock used to update the

RSD output. RSDCLK is generated by gapping a

216 kHz clock.

TSD

Input

AB7

The transmit section DCC (TSD) signal contains the

section data communications channel (D1-D3).

TSD is sampled on the rising edge of TSDCLK.

TSDCLK

Output

AA10

The transmit section DCC clock (TSDCLK) is used

to clock in the section DCC.

TSDCLK is a 192 kHz clock used to sample the

TSD input. TSDCLK is generated by gapping a 216

kHz clock.

RLD

Output

AA16

The receive line DCC (RLD) signal contains the line

data communications channel (D4-D12).

RLDCLK

Output

AB19

The receive line DCC clock (RLDCLK) is used to

clock out the line DCC.

RLDCLK is a 576 kHz clock used to update the

RLD output. RLDCLK is generated by gapping a

2.16 MHz clock.

TLD

Input

AA9

The transmit line DCC (TLD) signal contains the

line data communications channel (D4-D12).

TLD is sampled on the rising edge of TLDCLK.

TLDCLK

Output

AA11

The transmit line DCC clock (TLDCLK) is used to

clock in the line DCC.

TLDCLK is a 576 kHz clock used to sample the

TLD input. TLDCLK is generated by gapping a 2.16

MHz clock.

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