PM5352 datasheet(62/77 Pages) PMC

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PM5352 S/UNI STAR

DATA SHEET

PMC-1990421

ISSUE 2

SATURN USER NETWORK INTERFACE 155 (STAR)

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Bit

Type

Function

Default

Bit 7

Unused

Bit 6

Reserved

Bit 5

PMCATST

Bit 4

PMCTST

Bit 3

DBCTRL

Bit 2

R/W

IOTST

Bit 1

HIZDATA

Bit 0

R/W

HIZIO

This register is used to enable S/UNI-STAR test features. All bits, except

PMCTST, PMCATST and BYPASS are reset to zero by a reset of the

S/UNI-STAR using either the RSTB input or the Master Reset register.

PMCTST and BYPASS are reset when CSB is logic one. PMCATST is

reset when both CSB is high and RSTB is low. PMCTST, PMCATST and

BYPASS can also be reset by writing a logic zero to the corresponding

HIZIO, HIZDATA:

The HIZIO and HIZDATA bits control the tri-state modes of the

S/UNI-STAR . While the HIZIO bit is a logic one, all output pins of the

S/UNI-STAR except the data bus and output TDO are held tri-state.

The microprocessor interface is still active. While the HIZDATA bit is a

logic one, the data bus is also held in a high-impedance state which

inhibits microprocessor read cycles. The HIZDATA bit is overridden by

the DBCTRL bit.

IOTST:

The IOTST bit is used to allow normal microprocessor access to the

test registers and control the test mode in each TSB block in the

S/UNI-STAR for board level testing. When IOTST is a logic one, all

blocks are held in test mode and the microprocessor may write to a

block's test mode 0 registers to manipulate the outputs of the block

and consequentially the device outputs (refer to the "Test Mode 0

Details" in the "Test Features" section).

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