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PCA9641PW датащи(PDF) 28 Page - NXP Semiconductors |
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PCA9641PW датащи(HTML) 28 Page - NXP Semiconductors |
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28 / 55 page ![]() PCA9641 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 2.1 — 27 October 2015 28 of 55 NXP Semiconductors PCA9641 2-channel I2C-bus master arbiter 12.5 Bus transactions Fig 16. Write to the Interrupt Enable and Control registers using the Auto-Increment (AI) bit aaa-008571 A6 A5 A4 A3 A2 A1 A0 0 slave address R/W S START condition A acknowledge from slave 10 0 0 0 0 0 1 command code register auto increment A acknowledge from slave A P STOP condition A acknowledge from slave acknowledge from slave data Control register (CONTR) data Reserve Time register (RT) A acknowledge from slave data Status register (STATUS) |
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