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CS44600 датащи(PDF) 59 Page - Cirrus Logic |
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CS44600 датащи(HTML) 59 Page - Cirrus Logic |
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59 / 76 page ![]() DS633F1 59 CS44600 7.15 Peak Limiter Control Register (address 15h) 7.15.1 Peak Signal Limit All Channels (LIMIT_ALL) Default = 0 0 - individual channel 1 - all channels Function: When set to 0, the peak signal limiter will limit the maximum signal amplitude to prevent clipping on the specific channel indicating clipping. The other channels will not be affected. When set to 1, the peak signal limiter will limit the maximum signal amplitude to prevent clipping on ALL channels in response to ANY single channel indicating clipping. 7.15.2 Peak Signal Limiter Enable (LIMIT_EN) Default = 0 0 - Disabled 1 - Enabled Function: The CS44600 will limit the maximum signal amplitude to prevent clipping when this function is enabled. Peak Signal Limiting is performed by digital attenuation. The attack rate is determined by the Limiter At- tack Rate register. 7.16 Limiter Attack Rate (address 16h) 7.16.1 Attack Rate (ARATE[7:0]) Default = 00010000 Function: The limiter attack rate is user selectable. The effective rate is a function of the SRC output sampling fre- quency and the value in the Limiter Attack Rate register. Rates are calculated using the function RATE = (32/{value})/SRC Fs, where {value} is the decimal value in the Limiter Attack Rate register and SRC Fs is the output sample rate of the SRC which is determined by the PWM master clock frequency. SRC Fs equals 384 kHz for 24.576 MHz based clocks and 421.875 kHz for 27.000 MHz based clocks. Note: A value of zero in this register is not recommended, as it will induce erratic behavior of the limiter. Use the LIM_EN bit to disable the limiter function (see Peak Limiter Control Register (address 15h)). 765 43 21 0 RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED LIMIT_ALL LIMIT_EN 765 43 21 0 ARATE7 ARATE6 ARATE5 ARATE4 ARATE3 ARATE2 ARATE1 ARATE0 |
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