CS8416-CSZ datasheet(54/60 Pages) CIRRUS

54 / 60 page

DS578F3

CS8416

18.2.2 Capacitor Selection

The type of capacitors used for the PLL filter can have a significant effect on receiver performance. Large

or exotic film capacitors are not necessary as their leads and the required longer circuit board traces add

undesirable inductance to the circuit. Surface mount ceramic capacitors are a good choice because their

own inductance is low, and they can be mounted close to the FILT pin to minimize trace inductance. For

CRIP, a C0G or NPO dielectric is recommended, and for CFLT, an X7R dielectric is preferred. Avoid ca-

pacitors with large temperature co-coefficient, or capacitors with high dielectric constants, that are sensi-

tive to shock and vibration. These include the Z5U and Y5V dielectrics.

18.2.3 Circuit Board Layout

Board layout and capacitor choice affect each other and determine the performance of the PLL. Figure 24

contains a suggested layout for the PLL filter components and for bypassing the analog supply voltage.

The 0.1 µF bypass capacitor is in a 1206 form factor. RFLT, CFLT, CRIP, and the 1000 pF decoupling ca-

pacitor are in an 0805 form factor. The traces are on the top surface of the board with the IC so that there

is no via inductance. The traces themselves are short to minimize the inductance in the filter path. The

VA and AGND traces extend back to their origin and are shown only in truncated form in the drawing.

18.2.4 Component Value Selection

The external PLL component values are listed in Table 6.

Range (kHz)

RFLT

CFLT

CRIP

Settling Time

32 - 192

3 k

22 nF

1 nF

4 ms

Table 6. External PLL Component Values

FLT

1000

.1µF

RIP

Figure 24. Recommended Layout Example

CS8416-CSZ датащи(PDF) 54 Page - Cirrus Logic