MP86950

– INTELLI-PHASETM SOLUTION

W/ INTEGRATED MOSFETS AND DRIVERS

MP86950 Rev. 1.0

www.MonolithicPower.com

10

12/18/2020

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© 2020 MPS. All Rights Reserved.

OPERATION

The MP86950 is a 50A, monolithic, half-bridge

driver with integrated power MOSFETs. It is

ideal

for

multi-phase

buck

regulator

applications.

An external 3.3V supply is required to supply

both the VDD and VDRV pins. Operation

begins when the EN pin transitions from low to

high, and the VDD and VIN signals are higher

than the UVLO rising threshold.

Pulse-Width Modulation (PWM)

The pulse-width modulation (PWM) input can

operate as a tri-state input. When the PWM

input signal is within the tri-state threshold

window (tHT or tLT) for 40ns, the high-side

MOSFET (HS-FET) turns off and the low-side

MOSFET (LS-FET) enters diode emulation

mode. The LS-FET remains in diode emulation

mode until zero-current detection (ZCD). The

tri-state PWM input can come from a forced

middle-voltage PWM signal or can be made by

floating the PWM input so the internal current

source charges the signal to a middle voltage.

Figure 2 shows the propagation delay definition

from PWM to the SW node.

tRISING

tFALLING

tLT

tTH

tHT

tTL

SW

PWM

Hi-Z

Hi-Z

Figure 2: PWM Timing Diagram

Diode Emulation Mode

In diode emulation mode, PWM is in a tri-state

input. The LS-FET turns on if the inductor

current is positive. The LS-FET turns off if the

inductor current is negative or after the inductor

current crosses the ZCD threshold. Diode

emulation mode can be enabled by driving the

PWM pin to a middle state or floating PWM.

Current Sense (CS)

The

MP86950’s current sense (CS) is a

bidirectional current source proportional to the

inductor current. The current-sense gain (GCS)

is 10

μA/A. Typically, a resistor (RCS) from CS to

an external voltage is used to sink small

currents to provide a 0.7V to 2.1V voltage level

shift to meet the CS operating voltage. The CS

voltage range keeps the CS output current

linearly proportional to the inductor current.

The proper reference voltage (VCM) connected

to RCS can be calculated with Equation (1).

2.1V

V

R

I

0.7V

CM

CS

CS









(1)

ICS can be estimated with Equation (2):

CS

L

CS

I

I

G



(2)

The Intelli-PhaseTM CS output is used by the

controller to accurately monitor the output

current. The cycle-by-cycle current information

from CS is used for phase-current balancing,

over-current

protection,

and

active

voltage

positioning (output-voltage droop).

Positive

and

Negative

Inductor

Current

Limits

If an HS-FET over-current condition is detected

for four consecutive cycles, the HS-FET latches

off and the TMON/FLT pin is pulled high to

VDD

’s voltage level. The LS-FET turns on until

ZCD, and then turns off. Recycling the power

on VIN, VDD, or VDRV, or toggling EN releases

the latch and restarts the device.

If a -30A current is detected, the LS-FET turns

off for 40ns to limit the negative current. The

LS-

FET’s negative current limit will not trigger a

fault report.

Over-Temperature Protection (OTP)

When the junction temperature reaches the

over-temperature

threshold,

the

HS-FET

latches off, the TMON/FLT pin is pulled high to

VDD, and the LS-FET turns on until ZCD.

Temperature-Sense

Output

with

Fault

Indicator (TMON/FLT)

The TMON/FLT pin has dual functions. It acts

as the device

’s junction temperature sense and

fault function. These functions are described

below.

Junction Temperature Sense

The TMON/FLT voltage output is proportional to

the junction temperature if VDD exceeds its

UVLO threshold and the part is in active mode.

The gain is 8mV/°C with a 800mV offset at