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PACE1750AE

Document # MICRO-2 REV G

Parameter

V0

VMEA

≥ 3V

0.5V

0V

1.5V

1.5V

BUS ACQUISITION

Note:

A CPU contending for the BUS will assert the

BUS REQ line, and will acquire it when BUS GNT is assserted and the BUS is not locked

(

BUS LOCK is high).

SWITCHING TIME TEST CIRCUITS

Standard Output (Non-Three-State)

Three-State

Note:

All time measurements on active signals relate to the 1.5 volt level.