H838024 datasheet(11/697 Pages) RENESAS

11 / 697 page

Rev. 7.00 Mar 10, 2005 page xi of xlii

Item

Page

Revision (See Manual for Details)

1.3.1 Pin

Arrangement

Figure 1.4 Pin

Arrangement (TLP-

85V, H8/38024R

Group, H8/38024S

Group)

Title amended

1.3.2 Pin Functions

Table 1.5 Pin

Functions

20, 24

Table amended and note 5 added

Pin No.

Type

Symbol

FP-80A

TFP-80C

FP-80B TLP-85V

Pad

No.*

Pad

No.*

Pad

No.*

I/O

Name and Functions

Input

Clock

pins

Output

These pins connect to a

32.768-kHz or 38.4-kHz*

crystal oscillator.

See section 4, Clock

Pulse Generators, for a

typical connection

diagram.

5. Does not apply to H8/38124 Group.

2.8.1 Memory Map

Figure 2.16(1)

H8/38024,

H8/38024S, and

H8/38124 Memory

Map

Figure amended

HD64338024 (mask ROM version)

HD64338024S (mask ROM version)

HD64338124 (mask ROM version)

HD64738024 (PROM version)

Figure 2.16(3)

H8/38022,

H8/38022S, and

H8/38122 Memory

Map

Figure replaced

2.9.1 Notes on Data

Access

Figure 2.17 Data

Size and Number of

States for Access to

and from On-Chip

Peripheral Modules

Notes amended

3. Only the HD64F38024, HD64F38024R, HD64F38122, and HD64F38124 are equipped with

internal I/O registers from H'F020 to H'F02B and on-chip RAM from H'F780 to H'FB7F.

Attempting to access these areas on products other than the HD64F38024, HD64F38024R,

HD64F38122, and HD64F38124 will result in access to an empty area.

3.3.2 Interrupt

Control Registers

Interrupt Request

Bit 7

Table amended

Setting conditions:

When the timer A counter value overflows

H838024 датащи(PDF) 11 Page - Renesas Technology Corp

H838024 датащи(HTML) 11 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL