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H838024 датащи(PDF) 89 Page - Renesas Technology Corp

номер детали H838024
подробное описание детали  Renesas 8-Bit Single-Chip Microcomputer Super Low Power Series
PDF  697 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H838024 датащи(HTML) 89 Page - Renesas Technology Corp

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Section 2 CPU
Rev. 7.00 Mar 10, 2005 page 47 of 652
REJ09B0042-0700
Instruction
Size*
Function
BXOR
B
C
⊕ (<bit-No.> of <EAd>) → C
XORs the C flag with a specified bit in a general register or
memory, and stores the result in the C flag.
BIXOR
B
C
⊕ [~(<bit-No.> of <EAd>)] → C
XORs the C flag with the inverse of a specified bit in a general
register or memory, and stores the result in the C flag.
The bit number is specified by 3-bit immediate data.
BLD
B
(<bit-No.> of <EAd>)
→ C
Copies a specified bit in a general register or memory to the C flag.
BILD
B
~ (<bit-No.> of <EAd>)
→ C
Copies the inverse of a specified bit in a general register or
memory to the C flag.
The bit number is specified by 3-bit immediate data.
BST
B
C
→ (<bit-No.> of <EAd>)
Copies the C flag to a specified bit in a general register or memory.
BIST
B
~ C
→ (<bit-No.> of <EAd>)
Copies the inverse of the C flag to a specified bit in a general
register or memory.
The bit number is specified by 3-bit immediate data.
Notes: *
Size: Operand size
B:
Byte
Certain precautions are required in bit manipulation. See section 2.9.2, Notes on Bit
Manipulation, for details.
Figure 2.7 lists the format of the bit manipulation instructions.



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