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M24M02E-F датащи(PDF) 28 Page - STMicroelectronics

номер детали M24M02E-F
подробное описание детали  2-Mbit serial I²C bus EEPROM with configurable device address, software write protection registers, and preprogrammed device address
PDF  54 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24M02E-F датащи(HTML) 28 Page - STMicroelectronics

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6.5.4
Read operation on identification page
Following a start condition the bus controller sends a device select code with the R/W bit (RW) set to 0. The
device acknowledges this and waits for the address bytes where the identification page is located. The device
responds to each address byte with an acknowledge bit. Then, the bus controller sends another start condition,
and repeats the device select code, with the RW bit set to 1. The device acknowledges this, and outputs the
contents of the identification page. See in Table 9, Table 10, and Table 11 how to address the identification page.
After each byte read (data out), the device waits for an acknowledgment (data in) during the ninth bit time.
The output data of the identification page comes from consecutive addresses, with the internal address counter
automatically incremented after each byte output. After the last identification page address (FFh), the address
counter rolls-over, and the device continues to output data from identification page address 00h.
To terminate the stream of data byte, the bus controller must not acknowledge the byte, and must generate a stop
condition, as shown in Figure 21. Random read identification page.
If the bus controller does not acknowledge during this ninth time, the device terminates the data transfer as shown
in Figure 21. Random read identification page and switches to its standby mode.
Figure 21. Random read identification page
Dev sel *
Byte addr
Byte addr
Data out N
Random
Address
Read
Dev sel *
Data out
Dev sel *
Byte addr
Byte addr
Sequential
Random
Read
Dev sel *
Data out1
ACK
RW
ACK
ACK
ACK
RW
NO ACK
ACK
ACK
ACK
RW
ACK
ACK
RW
ACK
NO ACK
Note:
*: The seven most significant bits of the first device select code in a random read must match those of the device
select code in the write operation.
M24M02E-F
Instructions
DS14157 - Rev 2
page 28/54



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