PIC12F683-ESLASHMDQTP datasheet(65/176 Pages) MICROCHIP

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DS41211D-page 63

PIC12F683

9.1.5

INTERRUPTS

The ADC module allows for the ability to generate an

interrupt upon completion of an Analog-to-Digital

conversion. The ADC interrupt flag is the ADIF bit in the

PIR1 register. The ADC interrupt enable is the ADIE bit

in the PIE1 register. The ADIF bit must be cleared in

software.

This interrupt can be generated while the device is

operating or while in Sleep. If the device is in Sleep, the

interrupt will wake-up the device. Upon waking from

Sleep, the next instruction following the SLEEP

instruction is always executed. If the user is attempting

to wake-up from Sleep and resume in-line code

execution, the global interrupt must be disabled. If the

global interrupt is enabled, execution will switch to the

interrupt service routine.

Please see Section 12.4 “Interrupts” for more

information.

9.1.6

RESULT FORMATTING

The 10-bit A/D conversion result can be supplied in two

formats, left justified or right justified. The ADFM bit of

the ADCON0 register controls the output format.

Figure 9-3 shows the two output formats.

FIGURE 9-3:

10-BIT A/D CONVERSION RESULT FORMAT

9.2

ADC Operation

9.2.1

STARTING A CONVERSION

To enable the ADC module, the ADON bit of the

ADCON0 register must be set to a ‘1’. Setting the

GO/DONE bit of the ADCON0 register to a ‘1’ will start

the Analog-to-Digital conversion.

9.2.2

COMPLETION OF A CONVERSION

When the conversion is complete, the ADC module will:

• Clear the GO/DONE bit

• Set the ADIF flag bit

• Update the ADRESH:ADRESL registers with new

conversion result

9.2.3

TERMINATING A CONVERSION

If a conversion must be terminated before completion,

the GO/DONE bit can be cleared in software. The

ADRESH:ADRESL registers will not be updated with

the partially complete Analog-to-Digital conversion

sample. Instead, the ADRESH:ADRESL register pair

will retain the value of the previous conversion. Addi-

tionally, a 2 TAD delay is required before another acqui-

sition can be initiated. Following this delay, an input

acquisition is automatically started on the selected

channel.

Note:

The ADIF bit is set at the completion of

every conversion, regardless of whether

or not the ADC interrupt is enabled.

ADRESH

ADRESL

(ADFM = 0)MSB

LSB

bit 7

bit 0

bit 7

bit 0

10-bit A/D Result

Unimplemented: Read as ‘0’

(ADFM = 1)

MSB

LSB

bit 7

bit 0

bit 7

bit 0

Unimplemented: Read as ‘0’

10-bit A/D Result

Note:

The GO/DONE bit should not be set in the

same instruction that turns on the ADC.

Refer to Section 9.2.6 “A/D Conversion

Procedure”.

Note:

A device Reset forces all registers to their

Reset state. Thus, the ADC module is

turned off and any pending conversion is

terminated.

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