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ENC28J60T-C/SP датащи(PDF) 32 Page - Microchip Technology |
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ENC28J60T-C/SP датащи(HTML) 32 Page - Microchip Technology |
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32 / 96 page ![]() ENC28J60 DS39662B-page 30 Preliminary © 2006 Microchip Technology Inc. 4.2.7 SYSTEM RESET COMMAND The System Reset Command (SRC) allows the host controller to issue a System Soft Reset command. Unlike other SPI commands, the SRC is only a single- byte command and does not operate on any register. The command is started by pulling the CS pin low. The SRC opcode is the sent, followed by a 5-bit Soft Reset command constant of 1Fh. The SRC operation is termi- nated by raising the CS pin. Figure 4-7 shows a detailed illustration of the System Reset Command sequence. For more information on SRC’s Soft Reset, refer to Section 11.2 “System Reset”. FIGURE 4-7: SYSTEM RESET COMMAND SEQUENCE SO SI SCK CS 0 2 34 56 7 1 11 1 1 1 1 1 Opcode 1 High-Impedance State Data Constant (1Fh) |
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