1998 Aug 26

13

Philips Semiconductors

Preliminary specification

12-bit high-speed Analog-to-Digital

Converter (ADC)

TDA8768

APPLICATION INFORMATION

Fig.5 Application diagram.

The analog, digital and output supplies should be separated and decoupled.

(1) Single-ended clock signals can be applied if required.

(2) R1 and R2 must be determined in order to obtain a middle voltage of 3.6 V; see common mode input voltage.

In addition, to ensure a sufficient analog input stability, the minimum current into these resistors must be approximately 1 mA.

handbook, full pagewidth

MGR471

1

2

3

4

5

6

7

8

9

10

11

12

n.c.

n.c.

n.c.

n.c.

13 14 15 16 17 18 19 20 21 22

IR

D11

(MSB)

D10

TDA8768

44 43 42 41 40 39 38 37 36 35 34

33

32

31

30

29

28

26

25

24

23

27

D2

D1

D0 (LSB)

5 V

D3

D4

D5

D6

D7

D8

D9

100 nF

5 V

100

nF

100

nF

100

nF

output format select

chip select input

5 V

100

nF

Vref

(3)

5 V

n.c.

n.c.

n.c.

n.c.

n.c.

CLK

CLK

100 nF

100 nF

5 V

5 V

SH

mode

(2)

(1)

VI

VI

100

Ω

100

Ω

R1

VCCA

R2

4.7

µF

10

nF

220 nF

input

1 : 1