MCP3909-ISLASHSS datasheet(18/40 Pages) MICROCHIP

18 / 40 page

MCP3909

DS22025A-page 18

be the difference between the internal and external

voltage. The allowed input range for the external

voltage source goes from 2.2V to 2.6V for accurate

measurement error. A VREF value outside of this range

will cause additional heating and power consumption

due to the source resistor, which might affect measure-

ment error.

4.5

Power-On Reset (POR)

The MCP3909 contains an internal POR circuit that

monitors analog supply voltage AVDD during operation.

This circuit ensures correct device startup at system

power-up and system power-down events. The POR

circuit has built-in hysteresis and a timer to give a high

degree of immunity to potential ripple and noise on the

power supplies, allowing proper settling of the power

supply during power-up. A 0.1 µF decoupling capacitor

should be mounted as close as possible to the AVDD

pin, providing additional transient immunity (see

Section 6.0 “Applications Information”).

The threshold voltage is typically set at 4V, with a

tolerance of about ±5%. If the supply voltage falls

below this threshold, the MCP3909 will be held in a

Reset condition (equivalent to applying logic ‘0’ on the

MCLR pin). The typical hysteresis value is approxi-

mately 200 mV in order to prevent glitches on the

power supply.

Once a power-up event has occurred, an internal timer

prevents the part from outputting any pulse for

approximately 1s (with MCLK = 3.58 MHz), thereby

preventing potential metastability due to intermittent

resets caused by an unsettled regulated power supply.

Figure 4-3 illustrates the different conditions for a

power-up and a power-down event in the typical

conditions.

FIGURE 4-3:

Power-on Reset Operation.

4.6

High-Pass Filters and Multiplier

The active real-power value is extracted from the DC

instantaneous power. Therefore, any DC offset

component present on Channel 0 and Channel 1

affects the DC component of the instantaneous power

and will cause the real-power calculation to be

erroneous. In order to remove DC offset components

from the instantaneous power signal, a high-pass filter

has been introduced on each channel. Since the high-

pass filtering introduces phase delay, identical high-

pass filters are implemented on both channels. The

filters are clocked by the same digital signal, ensuring

a phase difference between the two channels of less

than one MCLK period. Under typical conditions

(MCLK = 3.58 MHz), this phase difference is less than

0.005°, with a line frequency of 50 Hz. The cut-off

frequency of the filter (4.45 Hz) has been chosen to

induce minimal gain error at typical line frequencies,

allowing sufficient settling time for the desired

applications. The two high-pass filters can be disabled

by applying logic ‘0’ to the HPF pin.

FIGURE 4-4:

HPF Magnitude Response

(MCLK = 3.58 MHz).

The multiplier output gives the product of the two high-

pass filtered channels, corresponding to instantaneous

real power. Multiplying two sine wave signals by the

same

ω frequency gives a DC component and a 2ω

component. The instantaneous power signal contains

the real power of its DC component, while also

containing 2

ω components coming from the line

frequency multiplication. These 2

ω components come

for the line frequency (and its harmonics) and must be

removed in order to extract the real-power information.

This is accomplished using the low-pass filter and DTF

converter.

4.7

Active Power Low-Pass Filter and

DTF Converter

For the active power signal calculation, the MCP3909

uses a digital low-pass filter. This low-pass filter is a

first-order IIR filter, which is used to extract the active

real-power information (DC component) from the

instantaneous power signal. The magnitude response

of this filter is detailed in Figure 4-5. Due to the fact that

the instantaneous power signal has harmonic content

(coming from the 2

ω components of the inputs), and

AVDD

4.2V

DEVICE

MODE

RESET

PROPER

OPERATION

RESET

PULSE

OUT

Time

-40

-35

-30

-25

-20

-15

-10

-5

0.1

100

1000

Frequency (Hz)

MCP3909-I/SS датащи(PDF) 18 Page - Microchip Technology

MCP3909-I/SS датащи(HTML) 18 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

датащи скачать

ссылки URL