MCP3909 datasheet(19/40 Pages) MICROCHIP

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DS22025A-page 19

MCP3909

since the filter is not ideal, there will be some ripple at

the output of the low-pass filter at the harmonics of the

line frequency.

The cut-off frequency of the filter (8.9 Hz) has been

chosen to have sufficient rejection for commonly-used

line frequencies (50 Hz and 60 Hz). With a standard

input clock (MCLK = 3.58 MHz) and a 50 Hz line

frequency, the rejection of the 2

ω component (100 Hz)

will be more than 20 dB. This equates to a 2

component containing 10 times less power than the

main DC component (i.e., the average active real

power).

FIGURE 4-5:

LPF1 Magnitude Response

(MCLK = 3.58 MHz).

The output of the low-pass filter is accumulated in the

digital-to-frequency converter. This accumulation is

compared to a different digital threshold for FOUT0/1

and HFOUT, representing a quantity of real energy

measured by the part. Every time the digital threshold

on FOUT0/1 or HFOUT is crossed, the part will output a

pulse (See Section 4.8 “Active Power FOUT0/1 and

HFOUT Output Frequencies”).

The equivalent quantity of real energy required to

output a pulse is much larger for the FOUT0/1 outputs

than the HFOUT. This is such that the integration period

for the FOUT0/1 outputs is much larger. This larger

integration period acts as another low-pass filter so that

the output ripple due to the 2

ω components is minimal.

However, these components are not totally removed,

since realized low-pass filters are never ideal. This will

create a small jitter in the output frequency. Averaging

the output pulses with a counter or a MCU in the

application will then remove the small sinusoidal

content of the output frequency and filter out the

remaining 2

ω ripple.

HFOUT is intended to be used for calibration purposes

due to its instantaneous power content. The shorter

integration period of HFOUT demands that the 2ω

component be given more attention. Since a sinusoidal

signal average is zero, averaging the HFOUT signal in

steady-state conditions will give the proper real energy

value.

4.8

Active Power FOUT0/1 and HFOUT

Output Frequencies

The thresholds for the accumulated energy are

different for FOUT0/1 and HFOUT (i.e., they have

different transfer functions). The FOUT0/1 allowed

output frequencies are quite low in order to allow

superior integration time (see Section 4.7 “Active

Power Low-Pass Filter and DTF Converter”). The

FOUT0/1 output frequency can be calculated with the

following equation:

EQUATION 4-1:

FOUT FREQUENCY

OUTPUT EQUATION

For a given DC input V, the DC and RMS values are

equivalent. For a given AC input signal with amplitude

of V, the equivalent RMS value is V/ sqrt(2), assuming

purely sinusoidal signals. Note that since the real

power is the product of two RMS inputs, the output fre-

quencies of AC signals are half of the DC inputs ones,

again assuming purely sinusoidal AC signals. The

constant FC depends on the FOUT0 and FOUT1 digital

settings. Table 4-2 shows FOUT0/1 output frequencies

for the different logic settings.

-40

-35

-30

-25

-20

-15

-10

-5

0.1

100

1000

Frequency (Hz)

FOUT Hz

()

8.06 V0

GFC

VREF

()

-----------------------------------------------------------

Where:

V0 = the RMS differential voltage on Channel 0

V1 = the RMS differential voltage on Channel 1

= the PGA gain on Channel 0 (current

channel)

FC = the frequency constant selected

VREF = the voltage reference

TABLE 4-2:

ACTIVE POWER OUTPUT FREQUENCY CONSTANT FC FOR FOUT0/1 (VREF =2.4V)

FC (Hz)

(MCLK = 3.58 MHz)

FOUT Frequency (Hz)

with Full-Scale

DC Inputs

FOUT Frequency (Hz)

with Full-Scale

AC Inputs

MCLK/221

1.71

0.74

0.37

MCLK/220

3.41

1.48

0.74

MCLK/219

6.83

2.96

1.48

MCLK/218

13.66

5.93

2.96

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