PS700 datasheet(26/38 Pages) MICROCHIP

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PS700

DS21760F-page 26

 2004 Microchip Technology Inc.

4.4.17

TRIPctrl – TRIP CONTROL REGISTERS

TRIPctrl: TRIP CONTROL REGISTERS (ADDRESS 76 HEX/118 DECIMAL)

lex

lent

VPex

VC1ent

VC2ent

SHent

Reserved

bit 7

bit 0

bit 7

Iex: Current Exit from Sample-Sleep Mode bit

A ‘1’ in this register will enable an exit from Sample-Sleep mode upon the following condition:

|current| > I+trip.

bit 6

Ient: Enter Sample-Sleep Mode on Current bit

A ‘1’ in this register will enable entry to Sample-Sleep mode under the following condition:

|current| < I-trip.

bit 5

VPex: Pack Voltage Exit from Sample-Sleep Mode bit

A ‘1’ in this register will enable an exit from Sample-Sleep mode upon the following condition:

Pack Voltage > VPtrip.

bit 4

VC1ent: Enter Sample-Sleep Mode on VC1 Voltage bit

A ‘1’ in this register will enable entry to Sample-Sleep mode upon the following condition:

VC1 < VCtrip.

bit 3

VC2ent: Enter Sample-Sleep Mode on VC2 Voltage bit

A ‘1’ in this register will enable entry to Sample-Sleep mode upon the following condition:

VC2 < VCtrip.

bit 2

SHent: Enter Shelf-Sleep Mode on Pack Voltage bit

A ‘1’ in this register will enable entry to Shelf-Sleep mode upon the following condition:

VPACK < VSHENT

bit 1

Reserved: Reserved bit location

bit 0

OV: Overflow bit

PS700 sets this bit when the input voltage is greater than the maximum value of the voltage

range for an A/D conversion.

Legend:

‘1’ = Bit is set

‘0’ = Bit is cleared

R = Reserved bit

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