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MCP616 датащи(PDF) 12 Page - Microchip Technology

номер детали MCP616
подробное описание детали  2.3V to 5.5V Micropower Bi-CMOS Op Amps
PDF  30 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP616 датащи(HTML) 12 Page - Microchip Technology

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MCP616/7/8/9
DS21613B-page 12
© 2005 Microchip Technology Inc.
4.0
APPLICATIONS INFORMATION
The MCP616/7/8/9 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process,
which includes PNP transistors. These op amps are
unity-gain stable and suitable for a wide range of
general purpose applications.
4.1
Inputs
The MCP616/7/8/9 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages.
Figure 2-33
shows
the
input
voltage
exceeding the supply voltage without any phase rever-
sal.
The inputs of the MCP616/7/8/9 op amps connect to a
differential PNP input stage. The Common Mode Input
Voltage Range (VCMR) includes ground in single-
supply systems (VSS), but does not include VDD. This
means that the amplifier input behaves linearly as long
as the Common Mode Input Voltage (VCM) is kept
within the specified limits (VSS to VDD – 0.9V at +25°C).
Input voltages that exceed the Absolute Maximum
Voltage Range (VSS – 0.3V to VDD + 0.3V) can cause
excessive current to flow into or out of the input pins.
Current beyond ±2 mA can cause reliability problems.
Applications that exceed this rating must be externally
limited with a resistor, as shown in Figure 4-1.
FIGURE 4-1:
Input Current-Limiting
Resistor (RIN).
4.2
DC Offsets
The MCP616/7/8/9 family of op amps have a PNP input
differential pair that gives good DC performance. They
have very low input offset voltage (±150 µV, max.) at
TA = +25°C, with a typical bias current of -15 nA
(sourced out of the inputs).
There must be a DC path to ground (or power supply)
from both inputs, or the op amp will not bias properly.
The DC resistances seen by the op amp inputs (R1||R2
and R4||R5 in Figure 4-2) need to be equal and less
than 100 k
Ω, to minimize the total DC offset.
FIGURE 4-2:
Example Circuit for
Calculating DC Offset.
To calculate the DC bias point and DC offset, convert
the circuit to its DC equivalent:
• Replace capacitors with open circuits
• Replace inductors with short circuits
• Replace AC voltage sources with short circuits
• Replace AC current sources with open circuits
• Convert DC sources and resistances into their
Thevenin equivalent form
The DC equivalent circuit for Figure 4-2 is shown in
Figure 4-3.
FIGURE 4-3:
Equivalent DC Circuit.
R
IN
Maximum expected V
IN
() V
DD
2 mA
------------------------------------------------------------------------------
R
IN
V
SS
Minimum expected V
IN
()
2 mA
---------------------------------------------------------------------------
VIN
MCP61X
RIN
VOUT
V1
MCP61X
VOUT
R3
C3
R2
R1
V2
R5
R4
V1
MCP61X
VOUT
R2
R1
VEQ
REQ
V
EQ
V
2
R
5
R
4
R
5
+
------------------
=
R
EQ
R
4 || R5
=



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