TDA6502 datasheet(17/44 Pages) PHILIPS

17 / 44 page

2000 Mar 16

Philips Semiconductors

Preliminary speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners

TDA6502; TDA6502A;

TDA6503; TDA6503A

11 CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply; Tamb =25 oC

VCC

supply voltage

4.5

5.0

5.5

ICC

supply current

at VCC =5V

all PMOS ports ‘off’

−

one PMOS port ‘on’ and

sourcing 25 mA

−

103

113

one PMOS port ‘on’ and sourcing

25 mA; a second port ‘on’ and

sourcing 5 mA

−

111

122

PLL part; VCC = 4.5 to 5.5 V; Tamb = −20 to +85 °C; unless otherwise speciﬁed

FUNCTIONAL RANGE

VPOR

power-on reset supply

voltage

below this supply voltage power-on

reset becomes active

−

3.2

−

divider ratio

15-bit frequency word

−

32767

14-bit frequency word

−

16383

fXTAL

crystal oscillator frequency

RXTAL =25to300 Ω−

4.0

−

MHz

ZXTAL

input impedance

(absolute value)

fXTAL = 4 MHz

600

1200

−Ω

PMOS PORTS: PINS PUHF, PVHFL, PVHFH AND FMST

IPn(off)

leakage current

VCC = 5.5 V; VPn =0V

−10

−−µA

VPn(sat)

output saturation voltage

VPn(sat) =VCC − VPn;

one buffer output is ‘on’ and

sourcing 25 mA

−

0.25

0.4

LOCK OUTPUT: PIN LOCK/ADC (IN 3-WIRE BUS MODE)

IUNLOCK

output current when the PLL

is out-of-lock

VCC = 5.5 V; VO= 5.5 V

−−

200

µA

VUNLOCK

output saturation voltage

when the PLL is out-of-lock

VUNLOCK =VCC − VO; IO = 200 µA

−

0.4

0.8

VLOCK

output voltage

the PLL is locked

−

0.2

0.40

ADC INPUT: PIN LOCK/ADC (IN I2C-BUS MODE)

VADC

ADC input voltage

see Table 11

−

VCC

IADC(H)

HIGH-level input current

VADC =VCC

−−

µA

IADC(L)

LOW-level input current

VADC =0V

−10

−−µA

BUS FORMAT SELECTION: PIN SW

VSW(L)

LOW-level input voltage

−

1.5

VSW(H)

HIGH-level input voltage

−

VCC

ISW(H)

HIGH-level input current

VSW =VCC

−−

µA

ISW(L)

LOW-level input current

VSW =0V

−100

−−µA

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