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ADN2913 датащи(PDF) 15 Page - Analog Devices

номер детали ADN2913
подробное описание детали  Continuous Rate 6.5 Mbps to 8.5 Gbps Clock and Data Recovery IC with Integrated Limiting Amp/EQ
PDF  35 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADN2913 датащи(HTML) 15 Page - Analog Devices

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Data Sheet
ADN2913
Rev. B | Page 15 of 35
Reg Name
R/W
Addr
(Hex)
Default
(Hex)
D7
D6
D5
D4
D3
D2
D1
D0
PRBS Rec 5
R
0x43
X
DATA_LOADED[15:8]
PRBS Rec 6
R
0x44
X
DATA_LOADED[23:16]
PRBS Rec 7
R
0x45
X
DATA_LOADED[31:24]
ID/Revision
REV
R
0x48
0x54
REV[7:0]
ID
R
0x49
0x15
ID[7:0]
HI_CODE
R
0x20
0xA8
Reserved
LO_CODE
R
0x21
0x00
Reserved
1
X means don’t care.
Table 8. Status Register, STATUSA (Address 0x6)
Bits
Bit Name
Bit Description
D5
LOS status
0 = no loss of signal
1 = loss of signal
D4
LOL status
0 = locked
1 = frequency acquisition mode
D3
LOS done
0 = LOS action not completed
1 = LOS action completed
D2
Static LOL
0 = no LOL event since last reset
1 = LOL event since last reset; clear using reset static LOL bit, Bit D2 in Register 0x8
D0
RATE_MEAS_COMP
Rate measurement complete
0 = frequency measurement incomplete
1 = frequency measurement complete; clear using RATE_MEAS_RESET bit, Bit D0 in Register 0x8
Table 9. Control Register, CTRLA (Address 0x8)
Bits
Bit Name
Bit Description
D7
Reserved to 0.
D6:D4
CDR_MODE[2:0]
CDR modes.
001 = lock to data (LTD).
011 = lock to reference (LTR).
000, 010, 1xx = reserved.
D3
Reserved to 0.
D2
Reset static LOL
Set to 1 to clear static LOL (Bit D2 in Register 0x6).
D1
RATE_MEAS_EN
Fine data rate measurement enable. Set to 1 to initiate a rate measurement.
D0
RATE_MEAS_RESET
Rate measurement reset. Set to 1 to clear a rate measurement.



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