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M24256E-FDW6TP датащи(PDF) 8 Page - STMicroelectronics |
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M24256E-FDW6TP датащи(HTML) 8 Page - STMicroelectronics |
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8 / 46 page ![]() Table 3. Configurable device address register description Bit Function Bits b7 to b4 Reserved bits - Read as '0'. (b7, b6, b5, b4)=(0,0,0,0) Bits b3 to b1 C2, C1, C0: Configurable device address bits. b3, b2, b1 are used to configure up to eight possibilities of chip enable address: • (b3, b2, b1) = (0, 0, 0): the chip enable address is 000 (factory delivery value) • (b3, b2, b1) = (0, 0, 1): the chip enable address is 001 • (b3, b2, b1) = (0, 1, 0): the chip enable address is 010 • (b3, b2, b1) = (0, 1, 1): the chip enable address is 011 • (b3, b2, b1) = (1, 0, 0): the chip enable address is 100 • (b3, b2, b1) = (1, 0, 1): the chip enable address is 101 • (b3, b2, b1) = (1, 1 0): the chip enable address is 110 • (b3, b2, b1) = (1, 1, 1): the chip enable address is 111 Bit b0 DAL: Device address lock bit. b0 locks the CDA register in read-only mode: • b0 = 0: bits b3, b2, b1, b0 can be modified • b0 = 1: bits b3, b2, b1, b0 cannot be modified and therefore the CDA register is frozen Note: Bits b3 to b0 can be updated (if b0 = 0) in the same write instruction. Setting b0 from 0 to 1 is an irreversible action. C2, C1, C0 and DAL are defining the chip enable address in the device select code and the device address lock. These bits can be written and re-configured with a write command. At power up or after reprogramming, the device load the last configuration of C2, C1, C0 and DAL values. In order to prevent unwanted change of configurable device address bits, the M24256E proposes to protect the CDA register,freezing it in read-only mode. The update of the CDA register is disabled (read-only) when the DAL bit is set to '1' (DAL=1b). In the same way, the update of the CDA register is enabled when the DAL bit is set to '0' (DAL= 0b). Note: • Updating the DAL bit from 0 to 1 is an irreversible action: the C2,C1,C0 and DAL bits cannot be updated any more. • If the write control input (WC) is driven high or if the DAL bit is set to 1, the write configurable device address command is not executed and the accompanying data byte is not acknowledged, as shown in Figure 7. In case of M24256E-F delivered with the pre programmed device address, the configurable device address register is locked at factory delivery and can only be read. The C2, C1, C0 bits are set as specified in Table 4 , and the DAL bit is set to 1. The corresponding commercial product number with the pre programmed device address are given in Table 4 . Table 4. Pre-programmed device address Commercial product number(1) Device address C2 C1 C0 M24256E-Fxx6T1 0 0 1 M24256E-Fxx6T2 0 1 0 M24256E-Fxx6T3 0 1 1 M24256E-Fxx6T4 1 0 0 M24256E-Fxx6T5 1 0 1 M24256E-Fxx6T6 1 1 0 M24256E-Fxx6T7 1 1 1 1. 'xx' in the part number varies depending on the package M24256E-F Configurable device address register (CDA) DS12687 - Rev 3 page 8/46 |
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